We are seeking a Design Verification Lead to drive verification for complex memory and storage designs.
Responsibilities
- Lead and manage a Design Verification team, ensuring delivery of verification achievements and project commitments.
- Define and drive verification strategy, architecture, and coverage goals for complex designs and programs.
- Own verification planning, execution, reviews, and sign‑off, including functional, timing, and mixed‑signal verification.
- Collaborate with Design Engineering to understand specifications, circuit intent, and performance metrics for design.
- Partner with multi‑functional teams (Product Engineering, Technology Development, CAD, Validation) to ensure alignment and issue resolution.
- Track verification progress, risks, and resource needs; communicate status clearly to partners and leadership.
- Support and guide debugging of complex functional and timing issues identified during pre‑silicon verification.
- Drive continuous improvement of verification methodologies, tools, flows, and best‑known methods (BKMs).
- Mentor and develop verification engineers through coaching, technical guidance, and performance management.
- Foster a collaborative, inclusive, and high‑performance team culture.
- Promote effective and compliant use of Micron‑approved AI tools to augment verification activities, improve execution efficiency, and support continuous improvement.
Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 8 to 16 years of experience in complex IC verification and/or IC design.
- Previous work experience in memory‑related fields is encouraged.
- Strong understanding of digital and analog/mixed‑signal verification methodologies.
- Solid knowledge of CMOS circuit design fundamentals and timing behavior.
- Hands‑on experience with digital and analog simulation tools (e.g., Verilog/SystemVerilog, HSPICE, PrimeSim, FineSim).
- Demonstrated ability to lead technical teams and manage complex, multi‑site projects.
- Excellent communication, planning, and problem‑solving skills.
- Strong hands‑on experience with SystemVerilog and UVM (or equivalent) verification methodologies.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.