SR ENGINEER, DDEG Design Methodology

Micron Technology, Inc; Hyderabad; On-site; INR 2,000,000 - 3,200,000; Full time

Job summary

Micron Technology, Inc. in Hyderabad, India seeks a Senior Engineer in DDEG Design Methodology to own verification and end-to-end analysis of complex full-chip designs, including DDR4/LPDDR4/DDR5 architectures and high-speed operations.

You will collaborate across global teams, leverage AI-assisted verification, and contribute to innovative memory technology developments while improving debug efficiency and coverage across pre-silicon stages.

Qualifications

• Experience in SystemVerilog and PLI coding.
• Experience in UVM test benches.
• Experience in DRAM, SRAM or memory-related fields.
• AMS verification and co-simulation experience.
• Good communication and team collaboration.

Responsibilities

• Leverage AI-based tools and automation to accelerate verification.
• Validate AI outputs before use with specs, simulations, and coverage.
• Provide verification support by simulating and debugging pre-silicon designs.
• Develop test cases and stimuli to increase functional coverage.
• Build SV testbenches at block and full-chip levels; collaborate on verification flows.

Skills

SystemVerilog

PLI coding

UVM Test Bench

DRAM memory

AMS verification

Co-simulation

Verilog

Python scripting

Communication skills

Education

Electronics Engineering degree

Tools

SPICE simulations

Verilog simulations

Job description

Req. ID: JR109038 SR ENGINEER, DDEG Design Methodology

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Unique Opportunities

• Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR4,LPDDR4,DDR5 and LPDDR5 that can operate at high speeds of up to 6400MT/s.
• Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design.
• Work on multi-functional tasks that can widen your skills.

Responsibilities

• Actively leverage AI‑based tools, agentic workflows, and automation frameworks to:
  • Accelerate verification cycle time
  • Assist in Test-Case/TB and various other components required for DRAM Design Verification
  • Improve debug efficiency across simulation and silicon learning loops
• Strong judgment to validate AI outputs before use (review assumptions, align with specs/standards, cross-check with simulations, waveforms, assertions, and coverage reports, and document what was accepted/changed) prior to incorporating results into design decisions, verification plans, or debug conclusions
• Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• Good understanding of digital / mixed signal circuits and experience in Digital /Mixed signal Verification. Understand the usage of tools like Virtuoso, Xcellium, Simvision, vsim, Waveview, Finseim, Hspice.
• Hands on experience in writing Verilog, Real Number Models is a plus.
• Hands on experience in building SV testbenches at Block and Fullchip Level.
• Hands on experience in SV, UVM based Verification. Good scripting skills using perl, python is a plus.
• Previous work experience in DRAM memory related fields is a plus. Must possess good communication, debugging skills and ability to work well in a team.

Core Requirements

• Good communication skills and ability to work well in a team
• Guide new team members and energetic engineers in the team
• Analytical capability for complex CMOS and/or gate level circuit designs
• Proficient with either SPICE and/or Verilog simulations

Qualifications & Skills

• Experience in SystemVerilog, PLI coding
• Experience in UVM Test Bench
• Experience in DRAM, SRAM or other memory related fields
• Experience in AMS verification and co-sim

Education

Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required

Job Profile(s):

Semiconductor Design Engineer 3

Relocation level: (TBD)

Before Getting Started

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As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.