Engineer, DEG Mobile DRAM Verification

Micron Technology, Inc; Hyderabad; On-site; INR 1,000,000 - 1,500,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Paid family leave

Paid time-off

Job summary

Micron Technology, Inc in Hyderabad is seeking a Senior Verification Engineer responsible for gate-level verification of DDR and LPDDR devices. This role emphasizes full-chip designs, debug, coverage, and AI automation in a collaborative team environment.

The ideal candidate will have expertise in SystemVerilog and experience with DRAM or memory-related fields. Additional benefits include medical, dental, vision plans, and paid family leave.

Qualifications

• Experience in DRAM, SRAM or other memory related fields.
• Good communication skills and ability to work well in a team.
• Exposure to gate-level simulations and logic schematic analysis.

Responsibilities

• Guide and set the direction for verification on projects.
• Provide verification support to design projects.
• Develop test cases to increase functional coverage.

Skills

SystemVerilog

Verilog

UVM test bench

AI-assisted tools for verification

Education

Bachelors or postgraduate degree in Electronics Engineering or related field

Job description

Job Overview

Senior Verification Engineer responsible for gate-level verification of DDR and LPDDR devices up to 9600MT/s. The role focuses on full‑chip designs, debug, coverage, and AI automation.

Responsibilities

• Guide and set the direction for verification within your areas of expertise on projects.
• Provide verification support to design projects by simulating, analyzing, and debugging pre‑silicon full‑chip designs.
• Develop test cases and stimulus to increase functional coverage for all DRAM and emerging memory architectures.
• Participate in developing verification methodology and environments for sophisticated products.
• Co‑work with international colleagues on developing new verification flows.
• Develop and maintain test benches and vectors, run regressions for coverage analysis and improvements.
• Identify verification pain points suitable for AI‑based automation and collaborate with cross‑functional teams.

Core Requirements

• Good communication skills and ability to work well in a team.
• Exposure to gate‑level simulations (with delays) and logic schematic analysis.
• Analytical capability for complex CMOS and/or gate‑level circuit designs.
• Proficient with Verilog simulations.

Qualifications & Skills

• Experience in SystemVerilog, PLI coding.
• Experience in UVM test bench.
• Experience in DRAM, SRAM or other memory related fields.
• Experience in timing analysis: setup/hold and critical data‑path timing analysis.
• Experience using AI‑assisted tools to improve verification productivity, with a strong emphasis on correctness, validation, and responsible use of enterprise‑approved AI systems.

Education

Bachelors or postgraduate degree in Electronics Engineering or related engineering field required.

Job Profile

• Semiconductor Design Engineer3
• Relocation level: (TBD)

Benefits

Micron offers a range of medical, dental, vision plans, income protection, paid family leave, paid time‑off, and paid holidays. For full details please refer to the Micron Benefits Guide.

Equal Employment Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.