SoC Design Verification Engineer

Qualcomm

Bengaluru

On-site

INR 3,000,000 - 5,000,000

Full time

4 days ago
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Job summary

Qualcomm in Bangalore is seeking SoC Design Verification Engineers with 5-12 years of experience to join a high-impact semiconductor team. You will verify next-generation SoCs and complex subsystem architectures, building robust verification environments and test benches.

Responsibilities include verification planning, coverage closure, RTL debug, and collaboration with design and validation teams to ensure product quality. Strong debugging and DF(D)D expertise are required.

Qualifications

  • 5-12 years experience in SoC verification or related field.
  • Proficiency with SystemVerilog/UVM environments and verification methodologies.
  • Experience with debug, coverage, and assertion-based verification.

Responsibilities

  • Develop and execute verification plans for SoC, subsystem, and IP designs.
  • Build and enhance SystemVerilog/UVM test environments.
  • Create testbenches, scoreboards, monitors, and coverage models to drive closure.
  • Lead functional verification, RTL debugging, and coverage closure activities.
  • Collaborate with design, architecture and validation teams to resolve issues.

Skills

Debugging
UVM
DFD/Verification Debug

Job description

Hiring: SoC Design Verification Engineers | Bangalore | 5-12 Years

Are you passionate about verifying next-generation SoCs and complex subsystem architectures? We're looking for experienced SoC Design Verification Engineers to join a high-impact semiconductor team working on cutting-edge silicon products.

What You'll Do
  • Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level designs.
  • Build and enhance SystemVerilog/UVM-based verification environments.
  • Create testbenches, assertions, scoreboards, monitors, and coverage models.
  • Drive functional verification, coverage closure, and RTL debug activities.
  • Perform interconnect and protocol verification.
  • Collaborate closely with design, architecture, and validation teams to resolve functional issues and improve product quality.
Required Skills
  • Strong debugging and problem-solving skills
  • UVM-based Verification Environment Development
  • Design-for-Debug (DFD) and Verification Debug
Desired Protocol Experience

Candidates should have experience in one or more of the following:

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