SoC Design Verification Lead

844 Altera Semiconductor Technology India Pvt. Ltd.; Bengaluru; On-site; INR 2,000,000 - 3,000,000; Full time

Job summary

844 Altera Semiconductor Technology India Pvt. Ltd. is looking for a Design Verification Lead in Bengaluru, Karnataka. You will be responsible for leading the SoC architecture verification, creating strategies, and developing test cases with a focus on full chip verification.

Ideal candidates should have a B.Tech/M.Tech degree and at least 12 years of experience in SoC verification, along with expertise in System Verilog and UVM methodology. This role requires excellent communication skills and the ability to work across various teams.

Qualifications

• 12+ years of experience in SoC verification.
• Experience with protocols like PCIe, Ethernet, USB.
• Flexibility in a dynamic environment.

Responsibilities

• Lead pre-silicon verification strategy and execution for SoC verification.
• Define and develop reusable verification plans and test benches.
• Document and execute verification strategy plans.

Skills

SoC architecture verification

System Verilog

UVM verification methodology

Power-aware simulations

Scripting in Linux/Unix

ARM-based SoC verification

Debugging and analysis skills

Team communication

Education

B.Tech/M.Tech in Electrical Engineering, Electronics or related field

Tools

Perl

Python

Job description

Job Overview

As a Design Verification Lead, you will be responsible for leading SoC architecture verification, including creating verification strategy, developing test cases, and building test benches using UVM methodology. Responsibilities also include full chip and/or system functional verification, defining verification strategies, methodology, and test plans to enable effective verification. You will coordinate cross‑functional efforts with Design, SW, and Architecture teams, use full application systems to verify performance, identify shortcomings, and drive a team toward project execution and delivery.

Responsibilities

• Lead pre‑silicon verification strategy and execution for SoC verification.
• Perform functional logic verification at multiple levels (block, subsystem, and full chip).
• Define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and verification environments to meet required coverage levels and microarchitecture specifications.
• Document, review, and execute verification strategy plans across methodologies (e.g., gate‑level simulation, power‑aware simulations) to enable feature coverage as per the microarchitecture specifications.
• Execute verification plans and run system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs.
• Replicate, root‑cause, and debug post‑silicon issues in the pre‑silicon environment.
• Absorb learning from post‑silicon on validation quality, update test plans for missing coverage, and propagate lessons to future products.
• Complete the verification life cycle: architecture, test plan, execution, debugging, and coverage closure.

Qualifications

• B.Tech/M.Tech in Electrical Engineering, Electronics, or related field with 12+ years of experience.
• Proficiency in System Verilog.
• Experience with UVM verification methodology and formal verification methods.
• Working knowledge of scripting in Linux/Unix environments; proficiency in Perl and/or Python is desirable.
• Experience with ARM‑based SoC verification.
• Experience with protocols such as PCIe, Ethernet, USB, TSN, etc.
• Experience with design for debug (JTAG, high‑speed USB, PCIe‑based debug is an add‑on).
• Strong communication skills and the ability to work with a team across multiple geographic sites.
• Flexibility in a dynamic environment.

Job Details

Job Type: Regular

Shift: Shift 1 (India)

Primary Location: Bengaluru, Karnataka, India

Additional Locations: Penang, 15, Penang, Malaysia

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.