Senior Lead Physical Design Engineer - Power, IR, and EM Engineering

Larsen & Toubro Ltd; Bengaluru; On-site; INR 4,500,000 - 7,500,000; Full time

Job summary

Larsen & Toubro Ltd. Bengaluru is seeking a Sr. Lead Physical Design with 10-18 years of experience to drive SoC level power integrity, EMIR/IR flows and grid planning.

You will lead the PDN modeling, validate dynamic and static IR, and coordinate with system/PMIC and package teams to ensure robust voltage response, meeting peak current requirements. The role requires team leadership, strong scripting, and proficiency with EDA tools in a fast-paced, hardware-software integrated environment.

Qualifications

• Candidate has a Bachelors or Masters in Electrical/Electrical Engineering or Electronics.
• Experience with EMIR/IR analysis and SoC power integrity is required.
• Strong scripting and data analysis skills with EDA tool proficiency.

Responsibilities

• Develop & run EMIR signoff flow at SOC.
• Close EMIR based on Dynamic and Static IR.
• Provide feedback on grid robustness to SOC floorplan team.
• Collaborate with system, PMIC and silicon package teams to model voltage response.
• Model PDN, including on-die power gating and in-rush current profiles.
• Model current profiles and peak demands of IPs.
• Apply problem solving, scripting, data analysis and use EDA tools.
• Demonstrate teamwork and flexibility in a dynamic environment.

Skills

EMIR Signoff

IR drop analysis

Power grid planning

Scripting

EDA tools

Teamwork

Education

Bachelors/Masters in EE

Tools

EDA tools

Job description

Sr. Lead Physical Design - Power/IR/EM Engineering Relevant Experience 10-18 Years Role: Sr Lead Physical Design This position is for senior level engineer Full chip level Power Distribution Network Design. He Shall be leading instrumental in power grid planning on SoC level for peak current requirements & to have Dynamic & Static IR drop assessment & closure.

Key Responsibilities

• Ability to Develop & run EMIR Signoff flow at SOC
• Ability to Close EMIR based on Dynamic (vectored and vectorless) & Static IR
• Can provide Feedback on Grid Robustness to SOC floorplan team
• Working with the system, PMIC and silicon package team to model the voltage response of the power delivery network.
• Model of the power delivery networks, including on-die power gating and in-rush current profiles.
• Model of the current profiles and peak current demands of various IPs.
• Strong Skills in problem solving, scripting, data analysis and experience with EDA tools.
• Teamwork / flexibility / ability to thrive in a dynamic environment are very important

Academic Credentials

• Bachelors or Master's degree in Computer/Electronics/Electrical Engineering electronics/Electrical Engineering