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SmartSOC is seeking an EMIR / Power Integrity Engineer with hands-on experience in EM/IR analysis, RedHawk-SC, and PG design/specification. The role focuses on EMIR signoff for complex SoC/ASICs, driving convergence, and collaborating with Physical Design teams to achieve full-chip and block-level signoff.
The candidate should have 3–10 years of EMIR/PI/ASIC signoff experience, with a strong ability to analyze IR drop, electromigration, and current density, and to provide ECO guidance to PnR
SmartSOC is looking for EMIR / Power Integrity Engineers with strong hands-on experience in EM/IR analysis, RedHawk-SC, and Power Grid (PG) design/specification. The role involves analyzing EMIR issues, driving convergence, and working closely with Physical Design teams to achieve full-chip/block-level signoff.
An engineer who can independently run RedHawk-SC EMIR simulations, debug violations, identify root causes, recommend PG/PnR fixes, and drive EMIR issues to signoff closure.