Sr. Lead Physical Design - Power/IR/EM E...

Larsen & Toubro Limited; Bengaluru; On-site; INR 2,400,000 - 4,800,000; Full time

Job summary

LTST-L&T Semiconductor Technologies Limited in Bengaluru seeks a Sr Lead Physical Design specialized in Power/IR/EM. You will drive full-chip PDN design, oversee EMIR signoff, and evaluate dynamic/static IR to meet peak current requirements.

You will collaborate with system, PMIC and package teams, model power delivery networks, and optimize voltage responses. Senior engineers with strong scripting and EDA tool experience are needed for a fast-paced, technical role.

Qualifications

• This role requires senior expertise in full-chip level EM/IR design for power integrity.
• Experience with EM IR signoff flow at SOC and power grid planning is essential.
• Proven ability to model PDN, IR drop, and current profiles for IPs.

Responsibilities

• Develop & run EMIR signoff flow at SOC level.
• Close EMIR using dynamic and static IR analyses.
• Provide feedback on grid robustness to floorplan and SOC teams.
• Model voltage response of power delivery networks with on-die gating.
• Model current profiles and peak demands of various IPs.
• Collaborate with system/PMIC/silicon package teams; use scripting for data analysis.
• Thrive in a dynamic environment with strong problem-solving skills.

Skills

EMIR signoff

IR drop

SOC power delivery

Scripting

Data analysis

EDA tools

Dynamic IR

Static IR

Grid robustness

Teamwork

Education

Bachelors or Masters in Computer/Electronics/Electrical Engineering

Job description

Sr. Lead Physical Design - Power/IR/EM E...

LNT/-LPD-E/1889620

• LTST-L&T Semiconductor Technologies Limited


• Bengaluru

Knowledge & Posting Location

Physical Design EM IR

Bachelor of Technology (BTech)

Job Description

Role: Sr Lead Physical Design

This position is for senior level engineer Full chip level Power Distribution Network Design. He Shall be leading instrumental in power grid planning on SoC level for peak current requirements & to have Dynamic & Static IR drop assessment & closure.

Key Responsibilities

• Ability to Develop & run EMIR Signoff flow at SOC


• Ability to Close EMIR based on Dynamic (vectored and vectorless) & Static IR


• Can provide Feedback on Grid Robustness to SOC floorplan team


• Working with the system, PMIC and silicon package team to model the voltage response of the power delivery network.


• Model of the power delivery networks, including on-die power gating and in-rush current profiles.


• Model of the current profiles and peak current demands of various IPs.


• Strong Skills in problem solving, scripting, data analysis and experience with EDA tools.


• Teamwork / flexibility / ability to thrive in a dynamic environment are very important

Academic Credentials

Bachelors or Master's degree in Computer/Electronics/Electrical Engineering