Senior Layout Engineers

SiMaxTech Pvt Ltd

Bengaluru

On-site

INR 900,000 - 1,500,000

Full time

3 days ago
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Job summary

SiMaxTech Pvt Ltd in Bengaluru is seeking a Senior Layout Engineer to lead the custom layout of analog and mixed-signal blocks. You will own floor planning, placement, routing, and optimization for performance, area, and reliability, working closely with circuit designers to translate schematics into robust layouts.

The role requires hands-on experience with industry-standard EDA tools (Cadence Virtuoso, Mentor Graphics, Synopsys), LVS/DRC closure, and mentoring junior engineers while ensuring

Qualifications

  • Strong skills in Layout Design and Custom Layout for analog and mixed-signal circuits.
  • Solid Circuit Design competencies, including understanding of Analog and Analog Circuits behavior and constraints.
  • Proficiency in Physical Verification, including DRC, LVS, and related sign-off methodologies.
  • Hands-on experience with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor/Siemens, Synopsys) for layout and verification.
  • Experience across multiple technology nodes (e.g., 65nm and below, advanced FinFET nodes) and awareness of layout challenges at advanced geometries.
  • Ability to interpret specifications, schematics, and timing/electrical requirements, and convert them into robust layout implementations.
  • Strong analytical skills, attention to detail, and capability to debug layout and verification issues efficiently.
  • Effective communication and collaboration skills, with experience mentoring or guiding junior engineers.
  • Bachelor’s or Master’s degree in Electronics, Electrical Engineering

Responsibilities

  • Own custom layout design for analog and mixed-signal blocks.
  • Perform floor planning, device placement, and routing with optimization for performance, area, and reliability.
  • Collaborate with circuit designers to translate schematics into layout.
  • Close LVS and DRC and support physical verification across nodes.
  • Review and mentor junior layout engineers; prepare documentation.
  • Participate in design reviews and ensure timelines and quality standards.
  • Proactive cross-functional communication to resolve design issues and improve methodologies.

Skills

Layout Design
Circuit Design
Physical Verification
EDA Tools
Multi-Node Experience
Specification Interpretation
Analytical Skills
Mentoring
Communication

Education

Bachelor’s or Master’s degree in Electronics or Electrical Engineering

Tools

Cadence Virtuoso
Mentor Graphics
Synopsys

Job description

Company Description

SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions to global customers. The organization has deep expertise across the semiconductor value chain, enabling next-generation products with high performance, quality, and accelerated time-to-market. Its engineering team covers the full design spectrum, including analog circuit design, RTL design, design verification, custom layout, physical design, and embedded design. SiMaxTech works across a wide range of process technologies, from mature nodes like 28nm, 40nm, and 65nm to advanced nodes such as 7nm, 5nm, 3nm, and emerging nodes like 2nm and 18A. Guided by a vision to be a preferred global partner, the company focuses on continuous learning, innovation, and a customer-centric approach to deliver reliable and scalable semiconductor solutions.

Exp: 4 - 7 Years
Notice Period: Immediate to 30 Days
Role Description

This is a full-time, on-site role for Senior Layout Engineers based in Bengaluru South. The role involves ownership of custom layout design for analog and mixed-signal blocks, including floor planning, device placement, routing, and optimization for performance, area, and reliability. Senior Layout Engineers will collaborate closely with circuit designers to translate schematics into layout, perform layout-versus-schematic (LVS) and design rule check (DRC) closure, and support physical verification across multiple technology nodes. The role includes reviewing and mentoring junior layout engineers, preparing documentation, participating in design reviews, and ensuring adherence to project timelines and quality standards. The position requires proactive communication with cross-functional teams to resolve design issues and contribute to continuous improvement of layout methodologies and best practices.

Qualifications
  • Candidates should possess strong skills in Layout Design and Custom Layout for analog and mixed-signal circuits.
  • Candidates should possess solid Circuit Design competencies, including understanding of Analog and Analog Circuits behavior and constraints.
  • Candidates should possess proficiency in Physical Verification, including DRC, LVS, and related sign-off methodologies.
  • Hands-on experience with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor/Siemens, Synopsys) for layout and verification.
  • Experience working across multiple technology nodes (e.g., 65nm and below, advanced FinFET nodes) and awareness of layout challenges at advanced geometries.
  • Ability to interpret specifications, schematics, and timing/electrical requirements, and convert them into robust layout implementations.
  • Strong analytical skills, attention to detail, and capability to debug layout and verification issues efficiently.
  • Effective communication and collaboration skills, with experience mentoring or guiding junior engineers.
  • Bachelor’s or Master’s degree in Electronics, Electrical Engineering
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