Senior DFT Engineer

Scaledge Technology; Bengaluru; On-site; INR 2,500,000 - 4,500,000; Full time

Job summary

Scaledge Technology in Bengaluru is seeking an experienced Senior DFT Engineer to lead the design and verification of scan architectures across complex SoCs. The role focuses on EDT/OCC integration, DFT implementation, and thorough debug across advanced designs.

You will drive memory and IP test simulations involving MBIST, IJTAG and boundary scan (JTAG), while coordinating pattern generation and retargeting activities with design, verification and physical design teams.

Qualifications

• Experience in DFT architecture and scan implementation for SoCs.
• Knowledge of MBIST and boundary scan methodologies.
• Collaborative experience with design, verification and physical design teams.

Responsibilities

• Define and implement Scan Architecture, including EDT/OCC integration.
• Perform DFT implementation, debug, and analysis across complex SoC designs.
• Execute and validate Memory & IP Test Simulations involving MBIST, IJTAG and Boundary Scan (JTAG).
• Drive pattern generation, validation, and retargeting activities.
• Collaborate with design, verification, and physical design teams to ensure high-quality DFT deliverables.

Skills

DFT architecture

Scan implementation

MBIST

Boundary scan

IJTAG

EDT/OCC integration

Memory Test Simulations

Pattern generation

Cross-functional collaboration

Job description

We are looking for an experienced Senior DFT (Design for Testability) Engineer to join our growing semiconductor team in Bangalore. If you have strong expertise in DFT architecture, scan implementation, MBIST, and boundary scan methodologies, we'd love to connect with you!

Key Responsibilities:-

Define and implement Scan Architecture, including EDT/OCC integration.

Perform DFT implementation, debug, and analysis across complex SoC designs.

Execute and validate Memory & IP Test Simulations involving:

MBIST

IJTAG

Boundary Scan (JTAG)

Drive pattern generation, validation, and retargeting activities.

Collaborate with design, verification, and physical design teams to ensure high-quality DFT deliverables.