Senior Design Verification Engineer, Silicon

Google LLC; Bengaluru; On-site; INR 3,500,000 - 6,500,000; Full time

Job summary

Google LLC in Bengaluru is seeking a Senior Design Verification Engineer to lead verification of complex digital design blocks and develop advanced verification environments. You will collaborate with design engineers to identify key verification scenarios and drive coverage toward tape-out.

The role requires 8 years of experience with verification methodologies (UVM/SystemVerilog) and test bench development.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience in developing and maintaining verification test benches, test cases, and test environments.

Responsibilities

• Plan the verification of complex digital design blocks at subsystem level by understanding the design specification and collaborating with design engineers to identify verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM or formally verify designs with SystemVerilog Assertions (SVA) and industry-leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Skills

UVM/SystemVerilog

Verification environments

Test bench development

Education

Bachelor's degree in Electrical/Computer Engineering

Master’s degree in Electrical Engineering/Computer Science

Job description

Share Senior Design Verification Engineer, Silicon

info_outline

info_outline X In most instances, this position requires in‑person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Engineering or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience in developing and maintaining verification test benches, test cases, and test environments.

Preferred qualifications:

• Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• Experience with low power, debug, Gate‑Level Simulation (GLS) and formal verification.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct‑to‑consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Responsibilities

• Plan the verification of complex digital design blocks at sub system level by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
• Create and enhance constrained‑random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner‑cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape‑out.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google’s EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.