Silicon Micro-architecture Design Lead, Google Cloud

Google LLC; Bengaluru; On-site; INR 3,500,000 - 7,500,000; Full time

Job summary

Google LLC seeks a Silicon Micro-architecture Design Lead for Google Cloud to drive complex IP/SOC development and integration in data-center accelerators. You will collaborate across Architecture, Verification, Power, Performance, and Physical Design to deliver high-performance designs for ML workloads.

You will lead multi-site engineers, define micro-architecture specs, and oversee RTL, synthesis, timing, and DFT, ensuring robust silicon bring-up and verification of block and SOC-level designs.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in ASIC/SoC development with Verilog/SystemVerilog.
• Experience in micro-architecture and design of IPs and Subsystems.
• Experience in ASIC/SoC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).

Responsibilities

• Lead a team of Engineers in the design organization to deliver complex IPs or Subsystems. Communicate and work with multi-disciplined and multi-site teams.
• Define micro-architecture (uArch) specifications and block-level design documents, including interface protocols, block diagrams, transaction flows, and pipeline details.
• Perform RTL development, subsystem integration, and System on a Chip (SoC) integration, as well as Lint, CDC, FV, and UPF checks.
• Participate in simulation debug, synthesis, timing and power closure, and silicon bring‑up.
• Participate in test plan and coverage analysis of the block and SOC-level verification.

Skills

ASIC/SoC development

Verilog/SystemVerilog

Micro-architecture design

IP/Subsystem design

SoC integration & verification

DFT

Power/Performance considerations

Education

Bachelor's degree in EE/CE/CS or related field

Master's or PhD in EE/CE/CS (preferred)

Tools

Python

Perl

Job description

Silicon Micro-architecture Design Lead, Google Cloud

Share Silicon Micro-architecture Design Lead, Google Cloud

In most instances, this position requires in-person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in ASIC/SoC development with Verilog/SystemVerilog.
• Experience in micro-architecture and design of IPs and Subsystems.
• Experience in ASIC/SoC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).

Preferred qualifications:

• Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
• Experience with coding languages (e.g., Python or Perl).
• Experience in System on a Chip (SoC) designs and integration flows.
• Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
• Knowledge of high-performance and low-power design techniques.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will join a team developing Application‑Specific Integrated Circuits (ASICs) to accelerate machine learning computation in data centers. You will collaborate with Architecture, Verification, Power and Performance, and Physical Design teams to specify and deliver quality designs for next‑generation accelerators. You will solve technical problems through micro‑architecture innovation and evaluate design trade‑offs between performance and power.

The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting‑edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world‑leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

• Lead a team of Engineers in the design organization to deliver complex IPs or Subsystems. Communicate and work with multi-disciplined and multi-site teams.
• Define micro-architecture (uArch) specifications and block-level design documents, including interface protocols, block diagrams, transaction flows, and pipeline details.
• Perform RTL development, subsystem integration, and System on a Chip (SoC) integration, as well as Lint, CDC, FV, and UPF checks.
• Participate in simulation debug, synthesis, timing and power closure, and silicon bring‑up.
• Participate in test plan and coverage analysis of the block and SOC-level verification.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.