Silicon Engineer, Design Verification

Google; Bengaluru; On-site; INR 1,500,000 - 2,500,000; Full time

Job summary

Google is seeking a Silicon Engineer for Design Verification in Bengaluru, India. This role involves planning and executing verification strategies for digital design blocks, developing constrained-random environments, and validating power-management features with SystemVerilog/UVM testbenches.

The candidate will craft coverage plans, collaborate with design teams, and contribute to high-performance, power-efficient silicon solutions powering Google products worldwide.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
• 1 year of experience with creating/using verification components and environments in UVM methodology.
• Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments.

Responsibilities

• Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
• Plan the verification of digital design blocks by understanding design specifications and collaborating with design engineers to identify key verification scenarios.
• Create and improve constrained-random verification environments using SystemVerilog and UVM. Optionally use SVA and formal tools for formal verification.
• Perform power-aware simulations and formal verification to validate power management features like clock gating, power gating, and DVFS. Develop and implement power-aware test cases, including stress and corner-case scenarios, for power integrity.
• Develop and execute coverage-driven verification plans to ensure comprehensive coverage of ASIC designs. Collaborate with design engineers to resolve coverage issues and improve design quality.

Skills

SystemVerilog

UVM

Constrained-random verification

DV testbenches

Test plan development

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or related field

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science

Tools

SystemVerilog

UVM

SVA

Formal tools

AMBA (APB/AXI/ACE)

Job description

Silicon Engineer, Design Verification

Google

Bengaluru, Karnataka, India

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  


• 1 year of experience with creating/using verification components and environments in UVM methodology at IP or Subsystem level.


• Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  


• Experience with image processing, computer vision or machine learning IPs.


• Experience with AMBA(APB/AXI/ACE) or other standard protocols.


• Familiarity with CPU, GPU or other computer architectures.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.

Responsibilities

• Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
  


• Plan the verification of digital design blocks by understanding design specifications and collaborating with design engineers to identify key verification scenarios.


• Create and improve constrained-random verification environments using SystemVerilog and UVM. Optionally use SVA and formal tools for formal verification.


• Perform power-aware simulations and formal verification to validate power management features like clock gating, power gating, and DVFS. Develop and implement power-aware test cases, including stress and corner-case scenarios, for power integrity.


• Develop and execute coverage-driven verification plans to ensure comprehensive coverage of ASIC designs. Collaborate with design engineers to resolve coverage issues and improve design quality.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.