Design Verification Manager, Silicon

Google Inc.; Bengaluru; On-site; INR 4,000,000 - 9,000,000; Full time

Job summary

Google Inc. is seeking a Share Design Verification Manager, Silicon Advanced in Bengaluru, India. You will lead verification for complex SoCs, drive pre-silicon emulation strategies, and mentor high-performing teams to deliver production-grade silicon.

You will engage in rigorous verification across pre- and post-silicon stages, shaping architecture, design, and software coordination for optimal performance and efficiency. In-person interviews are typically required.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 15 years of experience in front-end design or design verification.
• Experience in power-aware verification methodologies.
• Experience in fabric and interconnect architectures and cache coherency protocols.

Responsibilities

• Lead and manage verification activities for complex SoC architectures from pre-silicon to tape-out.
• Mentor engineering teams and drive execution with a focus on technical excellence and career growth.
• Drive SoC-level pre-silicon emulation strategies (Palladium, Zebu, SimXL) for co-verification and early bug detection.
• Oversee post-silicon debug activities and correlate verification coverage with silicon behavior.
• Develop and scale verification infrastructure and methodologies across the SoC with strong integration with architecture and design teams.

Skills

SystemVerilog

Verilog

UVM

Python

Perl

Education

Bachelor's degree in EE/CS

Master's degree in EE/CS

Tools

Palladium

Zebu

SimXL

Job description

Share Design Verification Manager, Silicon

Advanced

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders;deep expertise in domain.

In most instances, this position requires in-person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 15 years of experience in front-end design or design verification.
• Experience in power-aware verification methodologies.
• Experience in fabric and interconnect architectures and cache coherency protocols.

Preferred qualifications:

• Master's degree in Electrical Engineering or Computer Science or equivalent practical experience.
• Experience in verification of high-bandwidth memory subsystems (DDR5, LPDDR5, HBM) including physical layer (PHY) training, memory controllers, and JEDEC compliance.
• Extensive experience directly managing high-performing engineering teams with a proven track record of successfully delivering complex, production-grade SoCs.
• Technical expertise in SoC-level verification and strong design verification (DV) fundamentals using universal verification methodology (UVM)-based environments. Direct Experience with pre-silicon emulation platforms and hardware accelerators (e.g., SimXL, formal verification, or portable stimulus standard/PSS).
• Strong programming skills in SystemVerilog, Verilog, and scripting languages like Python or Perl.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Lead and manage comprehensive verification activities for complex System-on-Chip (SoC) architectures, ensuring robust quality standards from pre-silicon to tape-out.
• Manage and mentor high-performing engineering teams, driving execution, fostering a culture of technical excellence, and supporting career growth.
• Drive SoC-level pre-silicon emulation strategies (e.g., Palladium, Zebu, SimXL) to accelerate hardware-software co-verification, boot operating systems, and catch complex system-level bugs early.
• Oversee complex post-silicon debug activities, collaborating closely with post-silicon validation teams to root-cause silicon issues, bring up hardware, and correlate pre-silicon verification coverage with actual silicon behavior.
• Develop and scale aspects of logic verification infrastructure and advanced methodologies across the SoC, maintaining strong integration standards with architecture, design, and cross-functional teams.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.