Senior Design Verification Engineer, Silicon

Google; Bengaluru; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

Google in Bengaluru is seeking an experienced Verification Engineer to help verify complex digital designs for next‑generation hardware. You will plan verification across subsystems, build constrained‑random environments in SystemVerilog/UVM, and work with design teams to drive coverage and debug until tape-out.

The role requires a Bachelor's in EE/CS or equivalent, 8 years of verification experience, and familiarity with GLS; formal verification is a plus.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience in developing and maintaining verification test benches, test cases, and test environments.

Responsibilities

• Plan the verification of complex digital design blocks at sub system level by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Skills

Verification

UVM

SystemVerilog

Test benches

Education

Bachelor's degree in Electrical Engineering

Bachelor's degree in Computer Engineering

Master’s degree (preferred) in Electrical Engineering/Computer Science

Job description

• Bachelor's degree in Electrical Engineering, Computer Engineering or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience in developing and maintaining verification test benches, test cases, and test environments.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience in developing and maintaining verification test benches, test cases, and test environments.

Preferred qualifications

• Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• Experience with low power, debug, Gate-Level Simulation (GLS) and formal verification.

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Plan the verification of complex digital design blocks at sub system level by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .