Design Verification Engineer – IP / SoC / Subsystem

LeadSoc Technologies Pvt Ltd; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

LeadSoc Technologies Pvt Ltd is seeking engineers with deep expertise in Design Verification for IP, SoC, or subsystem levels. You will work on high-speed protocols like PCIe, USB, Ethernet, or CXL, and apply ARM architecture knowledge including Cortex cores.

Proficiency in SystemVerilog/UVM and developing testbenches, coverage, and regression environments is essential. Understanding SoC architecture, IP integration, and protocol-level debugging is required.

Qualifications

• Strong experience in Design Verification at IP, SoC, or Subsystem level.
• Hands-on experience with High-Speed Protocols such as PCIe, USB, Ethernet, CXL, or similar.
• Strong knowledge of ARM Architecture, including ARM Cortex processor-based designs.
• Expertise in SystemVerilog & UVM and verification methodology.
• Experience in developing testbenches, test plans, assertions, functional coverage, and regression environments
• Good understanding of SoC architecture, IP integration, and subsystem-level verification
• Debugging skills with simulation/emulation and protocol-level issues.
• Experience with protocol compliance, performance validation, and corner-case testing
• Strong scripting knowledge in Python/Perl/TCL is an added advantage.

Responsibilities

• Strong experience in Design Verification at IP, SoC, or Subsystem level.
• Hands-on experience with High-Speed Protocols such as PCIe, USB, Ethernet, CXL, or similar.
• Strong knowledge of ARM Architecture, including ARM Cortex processor-based designs.
• Expertise in SystemVerilog & UVM and verification methodology.
• Experience in developing testbenches, test plans, assertions, functional coverage, and regression environments
• Good understanding of SoC architecture, IP integration, and subsystem-level verification
• Debugging skills with simulation/emulation and protocol-level issues.
• Experience with protocol compliance, performance validation, and corner-case testing
• Strong scripting knowledge in Python/Perl/TCL is an added advantage.

Skills

Design Verification

High-Speed Protocols

ARM Architecture

SystemVerilog & UVM

Testbenches & Coverage

SoC/IP Integration

Scripting (Python/Perl/TCL)

Job description

Experience: 5–18 Years

Job Description:

• Strong experience in Design Verification at IP, SoC, or Subsystem level.
• Hands-on experience with High-Speed Protocols such as PCIe, USB, Ethernet, CXL, or similar.
• Strong knowledge of ARM Architecture, including ARM Cortex processor-based designs.
• Expertise in SystemVerilog & UVM and verification methodology.
• Experience in developing testbenches, test plans, assertions, functional coverage, and regression environments.
• Good understanding of SoC architecture, IP integration, and subsystem-level verification.
• Debugging skills with simulation/emulation and protocol-level issues.
• Experience with protocol compliance, performance validation, and corner-case testing is preferred.
• Strong scripting knowledge in Python/Perl/TCL is an added advantage.