Senior Analog Layout Engineer

Univision Technology Consulting; Bengaluru; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

Univision Technology Consulting is looking for a Senior Analog Layout Engineer to join our VLSI design team in Bangalore. This position requires strong expertise in custom analog and mixed-signal layout design, particularly with TSMC 5nm technology.

The successful candidate will work closely with circuit designers, executing designs that meet stringent performance and manufacturability requirements. Ideal applicants will have 4+ years of experience and a degree in Electronics or a related field.

Qualifications

• 4+ years of experience in Analog Layout Engineering.
• Experience with advanced technology nodes such as TSMC 5nm.
• Strong understanding of semiconductor device physics and process technologies.

Responsibilities

• Perform full-custom analog and mixed-signal layout design for advanced technology nodes.
• Develop layouts for various high-speed analog circuits.
• Collaborate with circuit designers to optimize layouts.

Skills

Analog/Mixed-Signal Layout

Advanced technology nodes (TSMC 7nm/5nm)

Device matching techniques

DRC, LVS, ERC

Semiconductor device physics

Cadence Virtuoso

Independent issue resolution

Education

Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, Microelectronics

Tools

Cadence Virtuoso

Job description

Job Title: Senior Analog Layout Engineer

Experience: 4+ Years

Location: Bangalore / Hyderabad ( But currently only Bangalore)

Job Summary

We are seeking an experienced Analog Layout Engineer to join our VLSI design team. The ideal candidate should have strong expertise in custom analog and mixed-signal layout design with hands‑on experience in advanced technology nodes, preferably TSMC 5nm. The candidate will work closely with circuit designers to develop high‑performance and manufacturable layouts while meeting stringent performance, area, and reliability requirements.

Key Responsibilities

• Perform full-custom analog and mixed-signal layout design for advanced technology nodes.
• Develop layouts for blocks such as PLL, ADC, DAC, Bandgap, LDO, SerDes, Memory Interfaces, and other high-speed analog circuits.
• Execute floor planning, device matching, routing, shielding, guard rings, and electromigration‑aware layouts.
• Ensure layouts meet DRC, LVS, ERC, and reliability requirements.
• Collaborate with circuit designers to optimize performance, area, power, and manufacturability.
• Perform parasitic extraction and support post‑layout verification activities.
• Work closely with methodology, verification, and physical design teams to achieve project milestones.
• Drive layout quality improvements and contribute to layout methodology development.

Required Skills

• Strong hands‑on experience in Analog/Mixed‑Signal Layout.
• Experience with advanced technology nodes such as TSMC 7nm/5nm (preferred).
• Expertise in device matching techniques, common centroid layouts, shielding, and noise isolation.
• Good understanding of DRC, LVS, ERC, PEX, and reliability checks.
• Strong knowledge of semiconductor device physics and process technologies.
• Experience with layout tools such as Cadence Virtuoso.
• Ability to analyze and resolve layout‑related issues independently.

Preferred Qualifications

• Experience in high‑speed analog designs, SerDes, PLLs, ADC/DAC, PMIC, or memory‑related analog blocks.
• Familiarity with FinFET technologies and advanced node design rules.
• Experience working directly with foundries such as TSMC.
• Good communication and teamwork skills.

Education

• Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, Microelectronics, or a related field.