Physical Design Leads

ACL Digital; Bangalore Rural; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

ACL Digital is seeking a Physical Design Lead in Bangalore to drive block and full-chip implementation from netlist to GDSII on sub-7nm/5nm/3nm nodes. You will lead hands-on floorplanning, CTS, PnR, STA, and dynamic/static power optimization, with physical sign-off (DRC/LVS/IR drop) using Synopsys or Cadence flows.

The role requires expertise in TCL/Python automation and mentorship across cross-functional teams. Notice period: 0-60 days.

Qualifications

• Experience leading physical design flows for sub-7nm/5nm/3nm nodes.

Responsibilities

• Lead hands-on floorplanning, CTS, PnR, and STA for blocks and full-chip.
• Manage dynamic/static power optimization and physical sign-off (DRC/LVS/IR drop).
• Mentor engineers and drive tapeout risk management across cross-functional teams.

Skills

Floorplanning

CTS

PnR

STA

Power optimization

Physical sign-off (DRC/LVS/IR drop)

TCL/Python automation

Leadership

Tools

Synopsys ICC2

PrimeTime

Cadence Innovus

Tempus

Job description

ACL Digital is looking for a Physical Design Lead in Bangalore to drive block and full-chip implementation from netlist to GDSII on sub-7nm/5nm/3nm nodes. In this role, you will lead hands-on floorplanning, CTS, PnR, STA, dynamic/static power optimization, and physical sign-off (DRC/LVS/IR drop) using Synopsys (ICC2, PrimeTime) or Cadence (Innovus, Tempus) flows. We are seeking technical leaders skilled in TCL/Python automation who can mentor engineers and manage tapeout risk across cross-functional teams.

Notice period of 0-60 days