Physical Design Lead (RTL–GDSII)

Mirafra Technologies; Bengaluru; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

Mirafra Technologies in Bengaluru is seeking an experienced Physical Design Lead to drive end-to-end RTL-to-GDSII execution for complex SoCs with a strong ownership of PPA and timing closure.

You will lead a team of PD engineers, interface with RTL/DFT/STA and foundry teams, and oversee tapeout readiness, design reviews, and ongoing methodology improvements to advance PD flows.

Qualifications

• Hands-on PD expertise with industry-standard tools.
• Experience driving RTL-to-GDSII on complex SoCs.
• Proven ownership of block or full-chip tapeouts.

Responsibilities

• Lead and mentor a team of PD engineers; manage schedules and deliverables.
• Interface with RTL, DFT, STA, Verification, Foundry, and Signoff teams.
• Handle ECOs, tapeout readiness, and design reviews.
• Improve PD methodologies, flows, and automation.

Skills

Physical design leadership

Team mentorship

RTL-to-GDSII workflow

Education

BE/B.Tech/M.Tech in Electronics

Tools

Innovus

ICC2

FusionCompiler

Tempus

PrimeTime

Job description

We are seeking an experienced Physical Design Lead to drive end-to-end RTL-to-GDSII execution for complex SoCs across advanced nodes, with strong ownership of PPA, timing closure, and team leadership.

Key Responsibilities

• Lead and mentor a team of PD engineers; manage schedules and deliverables
• Interface with RTL, DFT, STA, Verification, Foundry, and Signoff teams
• Handle ECOs, tapeout readiness, and design reviews
• Improve PD methodologies, flows, and automation

Skills & Experience

• Strong hands‑on PD expertise with Innovus / ICC2 / FusionCompiler / Tempus / PrimeTime / Etc.
• Experience in 28nm to 3nm nodes
• Proven ownership of block or full‑chip tapeouts

Education

B.E./B.Tech/M.Tech in Electronics or related fields