Physical Design Lead (Full Chip)

7Rays Semiconductors

Hyderabad

On-site

INR 3,500,000 - 7,000,000

Full time

5 days ago
Be an early applicant
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

7Rays Semiconductors invites a Senior Physical Design Engineer to lead end-to-end SoC floorplanning and P&R activities for advanced semiconductor projects in Hyderabad. You will drive floorplan strategy using Innovus, define IO ring structures, manage analog placement requirements, and ensure robust sign-off with DFM and ESD considerations.

The role demands 7+ years in physical design, strong scripting (TCL/Perl/Makefile), deep knowledge of routing, packaging interfaces, and hierarchical design

Qualifications

  • 7+ years experience in Physical Design.
  • Extensive expertise in Floorplanning for SoC using Innovus.
  • Must have knowledge and implementation strategies to create an IO ring in accordance with design specification.
  • Deep knowledge on ESD, latch-up etc for foundry requirements and placement strategies.
  • Hierarchical design implementation knowledge including partitions/HMs/tiles push down to each core/tile.
  • PG creation and push down methodologies knowledge and implementation.
  • Knowledge on Analog components and placement requirements.
  • RDL knowledge and working with packaging is a must for SoC floorplan designer.
  • PV clean-up on floorplan and self derive in all sign-off including Physical Verification, ESD and foundry/Analog requirements.
  • Deep scripting knowledge is essential.
  • Capable of providing solutions to flow, tool, design setup related issues at large team level.
  • Sign-off issues familiarity (metal-fill, spare-cells, DFM rules, boundary-cells, etc.) for latest process technologies.
  • Good problem-solving capabilities, proactive, hardworking with strong interpersonal skills.
  • Bachelor's Degree in Electrical, Electronics or Computer Engineering

Skills

Physical Design
Floorplanning
Innovus
IO ring design
Analog placement
Sign-off PV
TCL/Perl/Makefile
Algorithm development
Problem solving
Team collaboration

Education

Bachelor's Degree in Electrical/Electronics/Computer Engineering

Tools

RDL

Job description

At 7Rays Semiconductors (https://7rayssemi.com/), we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies

We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a proven track record of successful projects, we are committed to excellence and innovation in semiconductor design.

Job: Senior Physical Design Engineer

Experience: 7–12+ years

  • 7+ years experience in Physical Design
  • Extensive expertise in Floorplanning for SoC using Innovus
  • Must have a knowledge and implementation strategies to create an IO ring in accordance design specification
  • Have a deep knowledge on ESD, latch-up etc for foundary requirements and placement strategies
  • Should have a higherarchial design implementation knowledge which include partitions/HMs/tiles push down to each core/tile
  • PG creation and push down methodologies knowledge and implementation
  • Should have a knowledge on Analog components and their requirements in placements according to design specifications
  • RDL knowledge and working with packaging is a must for SoC floorplan designer
  • PV clean-up on floorplan and self derive in all the sign-off including Physical Verification, ESD and foundry/Analog requirements
  • Deep scripting knowledge is essential
  • Should be capable of providing solutions to flow, tool, design setup elated issues proactively at large team level
  • Strong TCL/Perl/Makefile scripting knowledge as well as experience developing complex algorithms, managing, and regressing P&R flows.
  • Familiar with sign-off issues (metal-fill, spare-cells, DFM rules, boundary-cells, etc.) for the latest generations of process technologies
  • Good problem-solving capabilities, proactive, hardworking with strong interpersonal skills
  • Bachelors Degree in Electrical, Electronics or Computer Engineering
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Physical Design Lead
Physical Design Lead

Mirafra Technologies • Bengaluru

On-site
INR 5,000,000 - 9,000,000
Lead Physical Design Engineer
Lead Physical Design Engineer

ACL Digital • Bengaluru

On-site
INR 1,200,000 - 2,000,000
Senior Physical Design Engineer
Senior Physical Design Engineer

LeadSoc Technologies Pvt Ltd • Bengaluru

On-site
INR 2,000,000 - 3,200,000
Lead / Staff/Sr. Staff Physical Design Engineer
Lead / Staff/Sr. Staff Physical Design Engineer

Sykatiya Technologies Pvt Ltd • Bengaluru South

Hybrid
INR 4,000,000 - 6,000,000
Physical Design Manager
Physical Design Manager

Best NanoTech • Bengaluru

On-site
INR 4,000,000 - 7,000,000
Senior Staff Physical Design Engineer
Senior Staff Physical Design Engineer

MaxLinear • Bengaluru

On-site
INR 1,500,000 - 2,500,000
Physical Design Engineer
Physical Design Engineer

NXP Semiconductors • Maharashtra

On-site
INR 1,400,000 - 2,100,000
Technical Lead- Physical Design
Technical Lead- Physical Design

eInfochips (An Arrow Company) • Bengaluru

On-site
INR 2,500,000 - 4,500,000
Physical Design Lead Engineer
Physical Design Lead Engineer

7Rays Semiconductors • Bengaluru

On-site
INR 1,600,000 - 2,300,000
Physical Design Engineer
Physical Design Engineer

FiniteHR Consulting • Bengaluru

On-site
INR 800,000 - 1,200,000