Manager Asic DV

Weekday AI (YC W21); Hyderabad; On-site; INR 1,400,000 - 2,000,000; Full time

Job summary

Weekday AI (YC W21) in Hyderabad, India is seeking an experienced Manager – ASIC Design Verification with 9–12 years of hands-on experience to lead verification activities for complex ASIC and SoC designs. You will drive verification planning, strategies, and execution while collaborating closely with design, firmware, and validation teams.

The role emphasizes leading verification projects, mentoring engineers, and ensuring high-quality silicon production-ready verification across PCIe-based

Qualifications

• 9–12 years of hands-on ASIC/SoC design verification experience.
• Strong expertise in verification methodologies and planning.
• Proven PCIe verification experience at protocol level.
• Experience leading verification projects and mentoring engineers.
• Ability to translate specs into verification plans.

Responsibilities

• Lead and manage the ASIC Design Verification team, providing technical direction and project guidance.
• Own verification planning, execution, tracking, and sign-off for complex ASIC/SoC projects.
• Develop verification strategies, test plans, coverage goals, and schedules.
• Drive functional, performance, and corner-case verification to identify issues early.
• Lead PCIe verification including protocol functionality, link training, and compliance scenarios.
• Review environments, testbenches, coverage reports, and debugging methodologies.
• Collaborate with RTL designers to translate specs into verification plans.
• Analyze simulation failures and coordinate with design teams to resolve issues.
• Establish verification methodologies, regression strategies, and quality processes.
• Track progress, risks, coverage closure and bug status; meet milestones.
• Mentor engineers and build a strong verification team for IP and subsystems.
• Coordinate with cross-functional teams to ensure smooth project execution.

Job description

Job Description:

This role is for one of Weekday’s clients

Min Experience: 9+ years
Location: Hyderabad, Telangana, India
JobType: full-time

We are seeking an experienced Manager – ASIC Design Verification with 9–12 years of experience to lead verification activities for complex ASIC and SoC designs. The ideal candidate will have strong expertise in design verification, PCIe, and verification methodologies, along with experience managing verification teams and driving projects from planning through sign-off. You will work closely with design, architecture, firmware, validation, and other cross-functional teams to ensure high-quality, robust, and production-ready silicon.

Key Responsibilities

• Lead and manage the ASIC Design Verification team, providing technical direction, mentoring, and project guidance.
• Own verification planning, execution, tracking, and sign-off for complex ASIC/SoC projects.
• Develop comprehensive verification strategies, test plans, coverage goals, and schedules aligned with project requirements.
• Drive functional, performance, and corner-case verification to identify design issues early in the development cycle.
• Lead verification of PCIe-based designs, including protocol functionality, configuration, link training, error handling, and compliance-related scenarios.
• Review verification environments, testbenches, test cases, coverage reports, and debug methodologies.
• Collaborate with RTL designers and architects to understand specifications and translate them into effective verification plans.
• Analyze simulation failures, identify root causes, and coordinate with design teams to resolve issues.
• Establish verification methodologies, coding standards, regression strategies, and quality processes.
• Track verification progress, risks, coverage closure, and bug status while ensuring project milestones are achieved.
• Participate in design and verification reviews and provide technical inputs on architecture, implementation, and verification challenges.
• Mentor engineers and build a strong technical verification team capable of handling complex IP and subsystem-level verification.
• Coordinate with cross-functional teams across design, firmware, validation, and physical implementation to ensure smooth project execution.

Must-Have Skills

• 9–12 years of hands-on experience in ASIC/SoC Design Verification.
• Strong expertise in verification methodologies and verification planning.
• Proven experience with PCIe verification, including protocol-level functionality and complex verification scenarios.
• Strong understanding of digital design concepts, ASIC development flows, simulation, debugging, and coverage closure.
• Experience leading verification projects and managing or mentoring verification engineers.
• Ability to analyze complex specifications and develop comprehensive verification strategies.
• Strong problem-solving, debugging, communication, and stakeholder-management skills.

Good-to-Have Skills

• Experience in IP verification and reusable verification environments.
• Exposure to subsystem-level verification and integration verification.
• Strong proficiency in SystemVerilog.
• Experience with industry-standard verification methodologies such as UVM.
• Familiarity with simulation, regression, functional coverage, code coverage, assertions, and constrained-random verification.
• Exposure to other high-speed interfaces and SoC interconnect technologies is an advantage.

Qualifications

Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field, with relevant experience in ASIC/SoC verification.