Lead - Analog Layout engineer

ACL Digital; Bengaluru; On-site; INR 2,800,000 - 5,600,000; Full time

Job summary

ACL Digital is seeking a seasoned Analog Layout Lead to own block-level layout from floorplanning to tapeout handoff, collaborating with circuit designers and fellow layout engineers to ensure robust designs.

The role emphasizes hands-on execution, deep understanding of layout effects, Calibre verification, and leadership for cross-functional teams in a fast-paced engineering environment in Bengaluru.

Qualifications

• 8–12 years of hands-on experience in Analog/Mixed-Signal IC Layout.
• Exposure to FD-SOI technologies such as GF22FDX is a plus.
• Experience with Calibre for DRC, LVS, and parasitic extraction.

Responsibilities

• Own and execute block-level layouts from floor planning to tapeout handoff.
• Collaborate with circuit designers and layout teams to optimize performance, area, and reliability.

Skills

Analog IC Layout

Mixed-Signal Layout

Leadership

Communication

Tools

Calibre

Job description

ACL Digital is seeking a seasoned and hands-on Analog Layout Lead to drive critical IC layout activities. In this role, you will take ownership of block-level layout execution from initial floorplanning all the way through tapeout handoff, working closely with circuit designers and fellow layout engineers.

Key Responsibilities

• Independent Execution: Own and execute block-level layouts independently with minimal supervision, managing the process from floor planning to tapeout handoff.
• Design & Verification: Apply deep understanding of advanced layout effects and ensure robust verification using Calibre verification tools.
• Collaboration: Drive effective cross-functional collaboration with circuit designers and layout teams to optimize performance, area, and reliability.

Required Qualifications & Skills

• Experience: 8–12 years of hands-on experience in Analog/Mixed-Signal IC Layout.
• Technical Expertise: Strong mastery of foundational analog concepts, including:
• Latch-up prevention
• Length of Diffusion (LOD) and Well Proximity Effect (WPE)
• Substrate isolation and Electro-Migration (EM)
• Experience working preferably in 40nm and/or 22nm nodes.
• Note: A mix of lower nodes (<16nm) and higher/planar nodes (>22nm) is acceptable. We are not looking for candidates with experience exclusively in lower nodes.
• Bonus: Exposure to FD-SOI technologies, particularly GF22FDX (recent GF22 experience is a strong plus, though not a strict hard filter).
• Verification: Strong proficiency with Calibre for DRC, LVS, and parasitic extraction sign-off.
• Soft Skills: Excellent communication skills with a proven ability to lead and collaborate effectively within a dynamic engineering environment.