IP/SOC Design Lead

Tessolve; Hyderabad, Chennai District, Bengaluru; On-site; INR 1,500,000 - 2,800,000; Full time

Job summary

Tessolve Semiconductor in India is seeking experienced IP/SoC Verification Engineers to strengthen our verification teams across multiple sites including Hyderabad. The role involves hands-on work with high-speed interface protocols and SystemVerilog/UVM environments to verify complex IP/SoC designs.

You will develop testbenches, run tests, debug protocol issues, and contribute to coverage closure while collaborating with design, architecture, and validation teams.

Qualifications

• 8-25 years of IP/SoC verification experience.
• Strong hands-on with SystemVerilog & UVM.
• Experience with PCIe, USB, Ethernet, DDR, MIPI (CSI/DSI), SATA, HDMI, or DisplayPort.
• Good understanding of SoC fundamentals (clocking, resets, interconnects).
• Experience with SVA assertion-based verification.
• Strong debugging and problem-solving skills.

Responsibilities

• Verify IP and SoC level functional verification.
• Develop SystemVerilog/UVM based verification environments.
• Verify high-speed protocols.
• Create and run testbenches and tests.
• Debug simulation failures and protocol issues.
• Ensure coverage closure and collaborate with design/architecture/validation teams.
• Support regression, reviews, and verification sign-off.

Skills

IP / SoC Verification

SystemVerilog

UVM

High-speed protocols

Debugging

Testbench development

Tools

Verilog

UVM Library

Job description

Hello ,

Please find the below JD for IP and SOC.

IP / SoC Verification Engineer High-Speed Protocols

Experience: 825Years

Location: Bengaluru | Chennai | Hyderabad

Company: Tessolve Semiconductor

We are looking for experienced IP / SoC Verification Engineers with strong hands-on exposure to high-speed interface protocols to join our growing verification teams.

Key Responsibilities

• IP and SoC level functional verification
• Development of SystemVerilog / UVM-based verification environments
• Verification of high-speed protocols
• Testbench development, test creation, and execution
• Debugging simulation failures and protocol issues
• Functional, code, and assertion coverage closure
• Collaboration with design, architecture, and validation teams
• Support regression, reviews, and verification sign-off

Mandatory Skills

• 8-25 years of experience in IP / SoC Verification
• Strong hands-on experience with SystemVerilog & UVM
• Experience with one or more high-speed protocols:
• PCIe, USB, Ethernet, DDR, MIPI (CSI/DSI), SATA, HDMI, DisplayPort
• Good understanding of SoC fundamentals (clocking, resets, interconnects)
• Experience with assertion-based verification (SVA)
• Strong debugging and problem-solving skills

Good to Have

• VIP integration and customization experience
• Low-power verification knowledge (UPF/CPF)
• Scripting skills (Python / Perl / Shell)
• Experience mentoring junior engineers