FPGA Validation Engineer

UST; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

UST in Bengaluru seeks an experienced FPGA Validation Engineer to validate PCIe protocols and verify FPGA-based systems. You will work across silicon and pre-silicon environments with a focus on high‑speed digital designs and debugging complex protocol issues.

The role requires hands-on lab work with protocol analyzers, logic analyzers, and test automation, collaborating with design, ASIC, firmware, and software teams to ensure robust performance.

Qualifications

• Bachelor's or Master's degree in Electronics, Electrical Engineering, or related field.
• 4–10 years of FPGA validation experience (hardware, post‑silicon, or validation).
• Strong PCIe architecture and protocol knowledge (Gen3/Gen4/Gen5).
• Experience with high-speed interfaces and lab equipment.

Responsibilities

• Develop and execute validation plans for FPGA platforms.
• Perform PCIe Gen3/Gen4/Gen5 protocol validation and compliance testing.
• Design test cases for PCIe bring-up, link training, enumeration and error injection.
• Debug hardware and firmware issues using protocol analyzers and logic analyzers.
• Collaborate with FPGA, ASIC, firmware and software teams to resolve issues.
• Analyze PCIe traces to identify root causes of functional and performance problems.
• Validate DMA, memory-mapped transactions, MSI/MSI‑X interrupts, SR‑IOV, PCIe power management.
• Support board bring-up, characterization, and qualification activities.
• Create validation reports, test documentation and debug logs.

Skills

PCIe Gen3/4/5

FPGA validation

Oscilloscopes

Python scripting

Linux validation

Debugging hardware

Test case development

Vivado

Quartus

SerDes knowledge

Education

Bachelor's/Master's in Electronics or Electrical Engineering

Tools

Xilinx Vivado

Intel Quartus

Job description

Job Title: FPGA Validation Engineer (PCIe)

Experience: 2 - 5 Years

Job Description:

We are seeking a highly motivated FPGA Validation Engineer with strong expertise in PCIe (PCI Express) protocol validation and FPGA-based system verification. The ideal candidate will be responsible for validating high-speed digital designs, debugging protocol-level issues, and ensuring robust performance of FPGA solutions in silicon and pre-silicon environments.

Key Responsibilities

• Develop and execute validation plans for FPGA-based platforms and subsystems.
• Perform PCIe Gen3/Gen4/Gen5 protocol validation, compliance testing, and interoperability testing.
• Design and develop test cases for PCIe bring-up, link training, configuration, enumeration, error injection, and performance validation.
• Debug hardware and firmware issues using validation tools such as protocol analyzers and logic analyzers.
• Collaborate with FPGA design, ASIC, firmware, and software teams to identify and resolve system-level issues.
• Analyze PCIe traffic traces and root‑cause functional and performance‑related problems.
• Validate DMA, memory‑mapped transactions, MSI/MSI‑X interrupts, SR‑IOV, and PCIe power management features.
• Support board bring‑up, characterization, and qualification activities.
• Create validation reports, test documentation, and debug logs.

Required Skills:

• Bachelor's/Master's degree in Electronics, Electrical Engineering, or related field.
• 4–10 years of experience in FPGA Validation, Hardware Validation, or Post‑Silicon Validation.
• Strong understanding of PCIe architecture and protocols (Gen3/Gen4/Gen5).
• Experience with FPGA platforms such as Xilinx (AMD) Vivado, Intel (Altera) Quartus, or equivalent.
• Familiarity with high‑speed interfaces such as PCIe, Ethernet, DDR, AXI, and SerDes.
• Hands‑on experience with lab equipment such as oscilloscopes, logic analyzers, and signal generators.
• Strong debugging skills across hardware, firmware, and software layers.
• Knowledge of Linux‑based validation environments and scripting (Python, Shell, Tcl).