Formal Verification Engineer

Iravan Technologies; Maharashtra; On-site; INR 1,400,000 - 2,100,000; Full time

Job summary

Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions.

The role seeks professionals with 4+ years in Formal Verification and hands-on experience with tools like Cadence Jasper or Synopsys VC-Formal.

Qualifications

• 4+ years of relevant experience in Formal Verification.
• Experience with at least one formal verification tool (e.g., Cadence Jasper, Synopsys VC-Formal).
• Expertise in property specification languages such as SVA/PSL, and proficiency in HDLs (SystemVerilog, Verilog or VHDL).

Responsibilities

• Verify designs using formal verification techniques and tools.
• Collaborate with design and verification teams to improve property coverage and closure.
• Support mixed-signal/DFT aspects where applicable and contribute to verification strategy.

Skills

Formal Verification

HDL Proficiency (SystemVerilog/Verilog

Tools

Cadence Jasper

Synopsys VC-Formal

Job description

Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions.

Experience: 4+ Relevant in FV

Location: BLR/Pune

JD

Experience with Formal Verification (e.g., sequential equivalence checking, Security Path verification, connectivity, low power and Formal property verification).

Experience with programming languages (e.g., Python/Perl and TCL).

Experience with at least one formal verification tool (e.g., Cadence Jasper, Synopsys VC-Formal).

Expertise in property specification languages (e.g., SVA, PSL), as well as proficiency in HDLs such as System Verilog, Verilog or VHDL.

Immediate to 30-day notice period candidates preferred