DFT Director

XQwave Pvt Ltd (Formerly Obsidian Solutions Pvt Ltd); Bengaluru; On-site; INR 900,000 - 1,600,000; Full time

Job summary

XQwave Pvt Ltd (Formerly Obsidian Solutions Pvt Ltd) is seeking a DFT engineer to define and implement the DFT architecture for SoC/ASIC designs, develop and validate ATPG patterns, and ensure robust testability.

The role includes JTAG/boundary scan, MBIST, DFT rule checks, GLS, and collaboration with design, verification, physical design, and silicon validation teams, including post-silicon bring-up and failure analysis.

Qualifications

• Define and implement DFT architecture for SoC / ASIC designs.
• Develop and validate ATPG patterns for stuck-at, transition, bridge, and path delay faults.
• Perform DFT rule checks (DRC) and resolve violations.
• Support JTAG / boundary scan / IEEE 1149.1 implementation.
• Run and debug Gate Level Simulations (GLS) for DFT patterns.
• Analyze and improve test coverage, pattern count, and test time.

Responsibilities

• Work closely with design, verification, physical design, and silicon validation teams.
• Support post-silicon bring-up and failure analysis.
• Create DFT documentation, methodology, and best-practice flows.

Skills

DFT architecture

ATPG patterns

JTAG/boundary scan

MBIST

IEEE 1149.1

Gate Level Simulations

Tools

GLS

Job description

Define and implement DFT architecture for SoC / ASIC designs

Perform scan insertion and scan chain stitching

Develop and validate ATPG patterns for stuck-at, transition, bridge, and path delay faults

Implement and verify MBIST / memory repair solutions

Perform DFT rule checks (DRC) and resolve violations

Support JTAG / boundary scan / IEEE 1149.1 implementation

Run and debug Gate Level Simulations (GLS) for DFT patterns

Analyze and improve test coverage, pattern count, and test time

Work closely with design, verification, physical design, and silicon validation teams

Support post-silicon bring-up and failure analysis

• Create DFT documentation, methodology, and best-practice flows