Get more replies from employers
Send a job-specific resume in minutes.
Sevya Multimedia is looking for experienced engineers to verify IP/full-chip using System Verilog/UVM. Ideal candidates will have a background in PCIe/DDR verification at the IP/chip level.
Applicants should possess over 3 years of experience in design verification and knowledge of digital design methodologies. Strong verbal and written communication skills are also essential.
We need experienced engineers to verify an IP/full-chip using System Verilog/UVM. Expertise in PCIe/DDR verification is preferable at IP/chip level.