Associate III - VLSI Analog Layout

UST; Hyderabad; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

UST in Hyderabad is seeking an experienced VLSI layout engineer to design analog and mixed-signal blocks for advanced nodes. You will drive floor planning, track planning, and device matching, and implement digital logic with VSR router.

The role requires 4+ years of experience, strong Cadence tool knowledge (VXL, VSR router) and proficiency with Calibre PV for verification. On-site role in Hyderabad with exposure to DRC/LVS/antenna/ERC PV checks.

Qualifications

• 4+ years of experience in VLSI design and layout
• Proficient with latest Cadence tools (VXL, VSR router)
• Experience with Calibre PV on advanced nodes
• Strong layout skills: device and routing matching
• Ability to design hierarchical layouts

Responsibilities

• TSMC 2nm layout design of analog and mixed signal blocks
• Floor planning, track planning, PG planning, device matching
• Digital logic implementation with VSR router
• DRC, LVS, Antenna, ERC PV verifications

Skills

VLSI design

Analog and mixed signal

Floor planning

Track planning

TSMC 2nm layout design

PG planning

Device matching

Tools

Cadence VXL/VSR router

Calibre PV

Job description

Role Description

Job Responsibilities / Day-to-Day Activities

• TSMC 2nm Layout design of analog and mixed signal blocks
• Floor planning, track planning, PG planning, device matching
• Digital logic implementation with VSR router
• DRC, LVS, Antenna, ERC PV verifications

Qualifications & Experiences:4+ years of experience

• Experience with TSMC 3nm and below nodes
• Well versed with Cadence latest GXL and VSR router
• Well versed with Calibre PV on lower technologies
• Excellent layout skills such as device matching, routing matching
• Ability to design hierarchical layouts

Skills

vlsi design,analog and mixed signal,floor planning,track planning,tsmc 2nm layout design,pg planning,device matching