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PQAngels Technologies Pvt. Ltd. in Bengaluru is seeking experienced Design Verification Engineers to work on ASIC, SoC and Subsystem verification projects.
You will leverage SystemVerilog and UVM to build verification environments and drive coverage, while collaborating with RTL and Architecture teams. Ideal candidates have 5–11 years of hands-on verification experience, strong debugging skills, and experience with PCIe, DDR, USB, Ethernet and NoC interfaces.
PQAngels Technologies is looking for experienced Design Verification Engineers to work on challenging ASIC, SoC, and Subsystem verification projects.
We are looking for engineers with strong hands-on expertise in SystemVerilog and UVM, along with experience verifying complex designs and high-speed interfaces.
Education: B.E./B.Tech/M.E./M.Tech in ECE, Electrical, Electronics, VLSI, Microelectronics or related fields.
Company: PQAngels Technologies Pvt. Ltd.
Location: Bengaluru
Experience: 5 -11 Years
Employment Type: Full-Time