ASIC RTL Design Engineer - DDR

Vhunt4u; Bengaluru; On-site; INR 600,000 - 1,200,000; Full time

Job summary

Vhunt4u is seeking an Electronics Engineer to work on defining architecture features, developing logic design, and simulating SoC designs. Ideal candidates will have skills in RTL coding and expertise in DDR memory controllers, ensuring high-quality SoC integration and compliance.

The role demands a strong background in electronics and the ability to work with IP providers to validate designs. This position is based in Bengaluru, Karnataka, offering a challenging yet rewarding environment.

Qualifications

• Expertise in architecture and microarchitecture features definition.
• Experience in logic design development.
• Knowledge in DDR memory controllers.
• Familiarity with CDC / RDC and Lint tools.
• Proficiency in RTL coding and simulation of SoC designs.

Responsibilities

• Optimize logic and write RTL to meet power, performance, area, and timing goals.
• Review verification plans to ensure design features are verified correctly.
• Collaborate with IP providers for integration and validation at the SoC level.

Education

B.E./B.Tech in Electronics, Electrical, or VLSI Engineering

M.E./M.Tech in Electronics, Electrical, or VLSI Engineering

Job description

Qualifications & Responsibilities

• B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering.
• Expertise in the definition of architecture and microarchitecture features for the block
• Expertise in developing the logic design
• Expertise in working on DDR memory controllers
• Expertise in CDC / RDC
• Expertise in Lint
• Expertise in register transfer level (RTL) coding
• Expertise in simulation of SoC design and integration of IP blocks and subsystems into a full chip SoC or discrete component design.
• Expertise in performing quality checks for various logic design aspects ranging from RTL to timing/power convergence.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Follows secure development practices to address the security threat model and security objects within the design.
• Works with IP providers to integrate and validate IPs at the SoC level.
• Drives quality assurance compliance for smooth IP SoC handoff.