Analog Layout Engineer - Apprentice

Pravarta Labs; Bengaluru; On-site; INR 300,000 - 600,000; Full time

Job summary

Pravarta Labs LLP is seeking candidates for a paid training program to become Junior Layout Engineer in Bengaluru. You will learn IC layout implementation and verification, working to deliver layouts that follow industry best practices with minimal rework from reviews.

The programme offers up to 6 months of paid training, after which you are confirmed as Junior Layout Engineer. No prior work experience is required, and a BE/BTech/MTech/BSc/MSc in Electronics or related fields is eligible.

Qualifications

• Eligibility includes BE/BTech/MTech/BSc/MSc in Electronics or VLSI disciplines.
• No prior work experience required.
• Paid training of up to 6 months leading to Junior Layout Engineer confirmation.

Responsibilities

• Analog and mixed-signal block layout under senior engineers.
• Floorplanning, device matching, guard rings and latch-up prevention.
• Running and fixing DRC and LVS.
• Responding to layout review comments with minimal rework.

Skills

Semiconductor physics

IC layout fundamentals

Communication skills

Education

Electronics degree (BE/BTech/ME/MTech/BSc/MSc)

Tools

CAD tools: Virtuoso XL, Assura, Calibre

Job description

Job Summary

Pravarta's design team is looking for candidates with a desire for continued learning who are eager to build expertise in IC layout implementation and verification, working with the team to deliver layouts that follow industry best practices without significant rework from layout reviews.

The programme

1. Paid training of up to 6 months, working with the team on real tasks
2. On successful completion you are confirmed as Junior Layout Engineer

Who can apply

No prior work experience is needed.

Qualification

B.E., B.Tech, M.Tech, B.Sc. or M.Sc. in Electronics and Communication, Electronics and Telecommunication, Electronics (Engineering or Science), VLSI Design and Technology, or VLSI Design and Embedded Systems.

Required skill set

• Solid understanding of electronics and semiconductor physics, preferably to degree level
• Strong fundamentals in IC layout principles, IC reliability and failure mechanisms
• Good verbal and / or written communication

Differentiators

• Knowledge of custom mixed-signal design flows, CMOS / BCD / FinFET technologies and device physics
• Understanding of analog layout techniques such as floorplanning, matching, latch-up prevention and verification
• Exposure to CAD tools (Virtuoso XL / Assura, Calibre DRC / LVS)
• Scripting in SKILL / Perl / Python is a plus

What you will work on

• Analog and mixed-signal block layout under the guidance of senior layout engineers
• Floorplanning, device matching, guard rings and latch-up prevention
• Running and fixing DRC and LVS
• Responding to layout review comments with minimal rework

Work location

Work location: Bengaluru.

How we select

Applications that do not meet the eligibility criteria are not taken forward.