Senior STA Design Engineer for SoCs - Timing & Automation

European Tech Recruit; Cork; On-site; EUR 70,000 - 100,000; Full time

Job summary

European Tech Recruit is partnering with a multinational semiconductor company in Cork to hire an experienced Static Timing Analysis Design Engineer. The role focuses on STA, timing constraints, and optimization for high-performance SOCs.

You will collaborate with cross-functional teams to ensure timing closure, validate models, and contribute to successful product development in a fast-paced engineering environment.

Qualifications

• Expertise in STA tools (PrimeTime, PrimeShield or Tempus) used for hierarchical analysis in large SoCs.
• Hands-on experience with Tweaker, PrimeClosure, PTECO, or Tempus ECO for timing closure.
• Highly proficient in automation: Python, TCL or Perl.

Responsibilities

• Perform STA and timing closure for complex cores and full-chip SOCs.
• Enhance techniques and methodologies for STA and timing closure.
• Drive accuracy of timing closure and static/dynamic flows to reduce turnaround time.
• Ensure compliance with timing signoff checklists and criteria.
• Automate timing and power data mining and processing.
• Participate in project proposal development including milestones and deliverables.
• Execute and deliver project goals with production support.
• Resolve issues in all phases of development to ensure smooth project execution.

Skills

Python

TCL

Perl

RTL-to-GDS

ASIC design flows

problem-solving

communication

Tools

PrimeTime

PrimeShield

Tempus

Tweaker

PrimeClosure

PTECO

Tempus ECO

Job description

European Tech Recruit is partnering with a multinational semiconductor company in Cork to hire an experienced Static Timing Analysis Design Engineer. The role focuses on STA, timing constraints, and optimization for high-performance SOCs.

You will collaborate with cross-functional teams to ensure timing closure, validate models, and contribute to successful product development in a fast-paced engineering environment.