STA Design Engineer (Visas Supported)

European Tech Recruit; Ireland; On-site; EUR 70,000 - 110,000; Full time

Job summary

European Tech Recruit in Ireland is seeking an experienced STA Engineer to join a Global Leading Semiconductor company. You will perform static timing analysis, develop timing constraints and optimize timing for high-performance, low-power products.

Based at our Cork R&D Centre, you will collaborate with cross-functional teams on timing signoff for Snapdragon cores and SOCs, driving automation and efficient timing closure.

Qualifications

• 4+ years of related work experience.
• Expertise in STA tools (PrimeTime, PrimeShield or Tempus) used for hierarchical analysis in large SoCs
• Hands-on experience with Tweaker, PrimeClosure, PTECO, or Tempus ECO for timing closure
• Highly proficient in automation: Python, TCL or Perl
• Strong knowledge of ASIC design flows (RTL-to-GDS)
• Interest in Design for Parametric Yield is an added advantage
• Comfortable with extraction, circuit simulation tools and environments is a plus
• Excellent problem-solving skills and result-driven approach, able to work and drive practical solutions under research environment.
• Good communication and personal skills in a multi-disciplinary, fast-paced engineering environment

Responsibilities

• Perform STA and timing closure for complex cores and full-chip SOCs.
• Develop timing constraints and optimize timing performance.
• Enhance techniques and methodologies for STA and timing closure.
• Drive accuracy of timing closure and static/dynamic flows to reduce turnaround time.
• Ensure compliance with timing signoff checklists and criteria.
• Automate timing and power data mining and processing.
• Assist in project proposal development with milestones and deliverables.
• Execute and deliver project goals in a timely manner with production support.
• Resolve issues in all phases of development to ensure smooth project execution.

Skills

STA/Timing analysis

Automation scripting

ASIC design flows

Communication skills

Problem solving

Tools

PrimeTime

PrimeShield

Tempus

Tempus ECO

Tweaker

PrimeClosure

PTECO

Job description

An exciting career opportunity for an experienced STA Engineer to join a Global Leading Semiconductor company, where you will will perform static timing analysis, develop timing constraints, and optimize timing performance for a variety of high-performance, high-quality, low-power world-class products.

The STA team at is responsible for evaluating block-level and top-level timing to ensure optimal performance and power efficiency in advanced cores and SOCs. You will collaborate with cross-functional teams to ensure timing closure and validate timing models, contributing to the successful execution of product development at the companies R&D Centre in Cork, Ireland.

Responsibilities:

• You will be a member of a team working on timing signoff for Snapdragon Cores and SOCs, methodologies and flows: Performing STA and timing closure for complex cores and full-chip SOCs
• Enhancing techniques and methodologies for STA and timing closure
• Driving accuracy of timing closure and static/dynamic flows to reduce turnaround time
• Ensuring compliance with timing signoff checklists and criteria
• Automation for timing and power data mining and processing
• Participating in project proposal development including key milestones and deliverables
• Executing and delivering project goals in a timely manner with production support
• Resolving issues in all phases of development to ensure smooth project execution

About You:

• 4+ years of related work experience
• Expertise in STA tools (PrimeTime, PrimeShield or Tempus) used for hierarchical analysis in large SoCs
• Hands-on experience with Tweaker, PrimeClosure, PTECO, or Tempus ECO for timing closure
• Highly proficient in automation: Python, TCL or Perl
• Strong knowledge of ASIC design flows (RTL-to-GDS)
• Interest in Design for Parametric Yield is an added advantage
• Comfortable with extraction, circuit simulation tools and environments is a plus
• Excellent problem-solving skills and result-driven approach, able to work and drive practical solutions under research environment.
• Good communication and personal skills in a multi-disciplinary, fast-paced engineering environment

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