Senior Physical Design Engineer: Timing-Driven ASIC & SoC

European Tech Recruit; Cork; On-site; EUR 90,000 - 135,000; Full time

Job summary

European Tech Recruit in Cork, Ireland, is seeking a Senior Physical Design Implementation Engineer to join a global semiconductor team. You will work on the end-to-end PD flow, from netlist handoff to GDS, including floorplanning, power planning, placement, CTS, and routing.

The ideal candidate has 4+ years of hands-on PD experience with 10nm and below, solid STA and timing-closure knowledge, power-integrity skills, and familiarity with DRC-clean layouts and physical verification.

Qualifications

• 4+ years of hands-on Physical Design experience.
• Full PD lifecycle knowledge from netlist to GDS.
• STA concepts, timing-closure strategies, and congestion awareness.
• Power analysis and power-integrity evaluation knowledge.
• Knowledge of PD verification flows and DRC-clean layouts.

Responsibilities

• Lead floorplanning, placement, CTS, routing optimizations.
• Ensure DRC-clean layouts and power integrity in designs.

Skills

Physical Design

Placement & Routing

STA & Timing Closure

Power Integrity

Floorplanning

Netlist to GDS

Tools

Cadence

Synopsys

GDSII

Job description

European Tech Recruit in Cork, Ireland, is seeking a Senior Physical Design Implementation Engineer to join a global semiconductor team. You will work on the end-to-end PD flow, from netlist handoff to GDS, including floorplanning, power planning, placement, CTS, and routing.

The ideal candidate has 4+ years of hands-on PD experience with 10nm and below, solid STA and timing-closure knowledge, power-integrity skills, and familiarity with DRC-clean layouts and physical verification.