Senior System Architect – FPGA/ASIC IP for 5G NR

AccelerComm Ltd

Southampton

On-site

GBP 90,000 - 120,000

Full time

5 days ago
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Benefits offered by this job

Competitive salaries
Bonus up to 20% + EMI options
Pension and private health insurance
Southampton Science Park offices with
EV charging points

Job summary

AccelerComm Ltd in Southampton, UK is seeking a Senior System Architect to define architectures across software, FPGA and ASIC, translating system and customer requirements into practical implementations. You will drive architecture from concept through verification and customer integration, closely collaborating with algorithm, software, FPGA and ASIC engineers.

You will influence requirements, system decomposition, interface definitions and performance analyses, while working with customers to

Qualifications

  • Experience in 3GPP 5G NR and wireless systems.
  • Proven ability to define and manage system and product requirements.
  • Experience architecting hardware/software partitions and interfaces.
  • Experience with FPGA/ASIC implementation and trade-offs.
  • Knowledge of fixed-point design, modelling and implementation.
  • Background in communications IP for FPGA/ASIC deployment.

Responsibilities

  • Develop and refine system architectures for FPGA/ASIC deployment.
  • Evaluate architectural options and trade-offs to meet requirements.
  • Collaborate with FPGA/ASIC designers and customers for integration and validation.
  • Contribute to requirements capture, system decomposition and interface definitions.

Skills

3GPP 5G NR
Signal processing
System requirements
Architecture design
FPGA/ASIC trade-offs
MATLAB / Python / C++
Customer interaction
Verifications & tests

Tools

MATLAB
Python
C++

Job description

AccelerComm Ltd in Southampton, UK is seeking a Senior System Architect to define architectures across software, FPGA and ASIC, translating system and customer requirements into practical implementations. You will drive architecture from concept through verification and customer integration, closely collaborating with algorithm, software, FPGA and ASIC engineers.

You will influence requirements, system decomposition, interface definitions and performance analyses, while working with customers to

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