Senior Design Engineer

AccelerComm Ltd; Southampton; On-site; GBP 65,000 - 90,000; Full time

Job summary

AccelerComm Ltd in Southampton, UK, is seeking multiple Senior Design Engineers to enable space-qualified 5G base stations deployed on satellites. You will develop RTL for ASIC/FPGA, targeting both FPGA and ASIC platforms, delivering standalone IP and integrated IP solutions.

You will collaborate with algorithm and system architecture teams, implement testbenches, use the latest EDA tools, and contribute to optimization across design, verification, and physical implementation.

Qualifications

• Expert knowledge of an RTL language for complex ASIC/FPGA products.
• Strong skillset delivering digital designs in ASIC/FPGA.
• Optimization of timing and hardware resources for high throughput data/signal processing; includes power management, synthesis, timing analysis.
• Track record collaborating across teams to deliver integrated solutions.
• Experience writing design specs, user guides, verification plans.

Responsibilities

• Translate requirements into micro-architectures for RTL implementations.
• Create testbenches and deploy designs on FPGA/ASIC platforms.
• Validate designs on FPGA development platforms; support system integration.
• Follow AccelerComm engineering methodology and contribute improvements to design flow and product quality.
• Collaborate with micro-architecture, design, verification, and physical implementation teams.

Skills

RTL Verilog/SystemVerilog

ASIC/FPGA design

Timing/resource optimization

Cross-team collaboration

Technical documentation

EDA tools

Tools

Verilog/SystemVerilog tools

FPGA/ASIC development platforms

Job description

Description

We are looking for multiple Senior Design Engineers who will work on revolutionary technology that is at the leading edge of non-terrestrial communications, a 5G base station to be deployed on board satellites. This technology will underpin the next generation of mobile standards, giving complete coverage to the entire globe. AccelerComm develops the baseband signal processing technology, using hardware acceleration to generate world-leading error resilience, capacity and power efficiency.

Department

Hardware

Location

Southampton, UK

Description

We are looking for multiple Senior Design Engineers who will work on revolutionary technology that is at the leading edge of non-terrestrial communications, a 5G base station to be deployed on board satellites. This technology will underpin the next generation of mobile standards, giving complete coverage to the entire globe. AccelerComm develops the baseband signal processing technology, using hardware acceleration to generate world-leading error resilience, capacity and power efficiency.

You will work on the latest generation space-qualified devices, delivering standalone IP and integrated IP solutions.

Key Responsibilities

• Work closely with the Algorithm and System Architecture teams to understand requirements and translate them into mirco-architectures for RTL implementations
• Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of appropriate testbenches
• Deploy your designs onto the latest FPGA development platforms for validation and system integration
• Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product
• Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA

Skills, Knowledge & Expertise

Essential

• Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products
• A strong skillset in delivering digital designs in the ASIC and FPGA industry
• Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis
• Track record in collaborating across teams to produce integrated solutions
• Experience in technical documentation writing – design specifications, user guides, verification plans
• Expert user of EDA tools for simulation and synthesis

Desirable

• Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming)
• Familiarity with the AMBA bus protocols
• Understanding of UVM verification techniques or practical experience using UVM for IP verification
• Experience using C++/SystemC for design modelling and integration
• Experience with high speed interfaces such as PCI-E or JESD
• Knowledge of a scripting language, such as Python
• Knowledge and appreciation of project methodologies across the design lifecycle, including agile and waterfall, requirement capture and traceability
• Experience with AMD FPGAs and the associated design tools or with any EDA’s ASIC backend tools