Senior PCIe/CXL Sub-System Verification Engineer

Arm

Cambridge

Hybrid

GBP 97,000 - 132,000

Full time

12 days ago
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Job summary

Arm’s Solutions Engineering team seeks an experienced verification engineer specializing in PCIe and CXL to verify high‑speed IOs at the sub‑system level. You will collaborate with architects, RTL design and verification engineers across the UK, US, Canada and India to build next‑generation SoCs based on Arm IP.

Using the latest nodes such as 3nm and new 3D packaging, we aim to demonstrate industry-leading performance by architecting, implementing and fabricating powerful silicon test chips.

Qualifications

  • Bachelor’s or Master’s degree in Computer Science or Electrical/Computer Engineering (or similar).
  • 5+ years of verification experience on PCIe or CXL subsystems or SoCs.
  • Solid understanding of digital hardware design and Verilog HDL.
  • Experience with UVM based verification.
  • Familiarity with verification strategies like test plans and coverage.

Responsibilities

  • Craft test plans, develop SystemVerilog/Verilog/UVM testbenches and tests, and debugging of test failures.
  • Review architecture and design specifications to build a verification strategy.
  • Develop and improve verification methodologies used by the team.
  • Collaborate with other teams on microarchitecture, verification methodologies and system performance.
  • Balance work with Project Management and guide junior team members.

Skills

Verilog HDL
SystemVerilog
UVM
PCIe/CXL verification
Debugging
Emulation
Architecture review

Education

Bachelor's or Master's in CS/ECIE

Tools

Emulation platforms
Transactors
PCIe/CXL IPs

Job description

Arm’s Solutions Engineering team seeks an experienced verification engineer specializing in PCIe and CXL to verify high‑speed IOs at the sub‑system level. You will collaborate with architects, RTL design and verification engineers across the UK, US, Canada and India to build next‑generation SoCs based on Arm IP.

Using the latest nodes such as 3nm and new 3D packaging, we aim to demonstrate industry-leading performance by architecting, implementing and fabricating powerful silicon test chips.

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