Senior PCIe/CXL Verification Engineer — Hybrid

Arm Limited

Cambridge

Hybrid

GBP 70,000 - 110,000

Full time

14 days+
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Job summary

Arm Limited is seeking an experienced verification engineer to join a Sub-System level team focused on PCIe and CXL verification and performance analysis. You will craft test plans, build SystemVerilog/Verilog/UVM testbenches, and debug complex test failures to ensure robust IO verification.

You will collaborate with RTL architects, verification engineers and PMs across global sites to define verification strategies and drive results in a hybrid working environment.

Qualifications

  • Bachelor’s or Master’s degree in Computer Science or Electrical/Computer Engineering (or similar field).
  • Experience in verification of PCIe or CXL subsystems or SoCs, 5+ years.
  • Solid understanding of digital hardware design and Verilog HDL.
  • Knowledge of System Memory Management Unit and Generic Interrupt Controller Integration with PCIe.
  • Experience with PCIe & CXL IPs and Emulation friendly Transactors.

Responsibilities

  • Craft test plans for sub-system verification.
  • Develop SystemVerilog/Verilog/UVM testbenches and tests; debug failures.
  • Develop and improve verification methodologies used by the team.
  • Collaborate with design, architecture and other teams on microarchitecture and validation.
  • Guide and support junior team members and coordinate with Project Management.

Skills

Verilog HDL
SystemVerilog
UVM verification
PCIe/CXL verification
Emulation transactors
Simulation platforms
Debugging
Testbench development
Verification strategy
Formal verification

Education

Bachelor's or Master's in Computer Science or Electrical/Computer Engineering

Job description

Arm Limited is seeking an experienced verification engineer to join a Sub-System level team focused on PCIe and CXL verification and performance analysis. You will craft test plans, build SystemVerilog/Verilog/UVM testbenches, and debug complex test failures to ensure robust IO verification.

You will collaborate with RTL architects, verification engineers and PMs across global sites to define verification strategies and drive results in a hybrid working environment.

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