Senior Design Lead — Satellite 5G Hardware

AccelerComm Ltd; Southampton; On-site; GBP 110,000 - 145,000; Full time

Job summary

AccelerComm Ltd. is seeking a Principal Design Team Leader to steer the hardware design of 5G base station and space-qualified IP. You will guide RTL/ASIC/FPGA development, drive delivery, and ensure robust verification, with a focus on power efficiency and performance.

The role requires hands-on leadership, collaboration with cross-functional teams, and strategic input to roadmap decisions. You will mentor engineers and shape the technical path for next-gen devices.

Qualifications

• Proven track record of leading high-performing teams.
• Expert RTL design knowledge (Verilog/SystemVerilog) for ASIC/FPGA.
• Strong delivery of digital designs for ASIC/FPGA.
• Experience optimizing timing and hardware resources for high-throughput processing.
• Proficient with EDA tools for simulation and synthesis.
• Familiar with agile and waterfall design lifecycles.
• Knowledge of C++/SystemC for design modelling.
• Understanding of multi-disciplinary system architecture.
• Experience with UVM verification techniques.
• Experience with high-speed interfaces (AMBA, PCI-E, JESD).

Responsibilities

• Provide strategic vision to inform technical decision-making and planning at a company level, working with Algorithm, System Architecture and Software teams.
• Take responsibility for the successful and timely delivery of projects by providing technical leadership.
• Provide managerial leadership to build knowledge and support the team development.
• Work closely with the exec team to translate product requirements into hardware team deliverables.
• Support discussions with customers during presales and product development.
• Oversee the implementation of designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches.
• Lead AccelerComm's engineering methodology, processes, and design techniques, integrating AI where possible.
• Nurture professional growth of team members through regular mentoring, coaching, and feedback.

Skills

Team leadership

RTL design

ASIC/FPGA delivery

Timing/Power optimization

EDA tools

Project management (Agile/Waterfall)

C++/SystemC modelling

UVM verification

High-speed interfaces

System architecture

Tools

EDA tools

Job description

AccelerComm Ltd. is seeking a Principal Design Team Leader to steer the hardware design of 5G base station and space-qualified IP. You will guide RTL/ASIC/FPGA development, drive delivery, and ensure robust verification, with a focus on power efficiency and performance.

The role requires hands-on leadership, collaboration with cross-functional teams, and strategic input to roadmap decisions. You will mentor engineers and shape the technical path for next-gen devices.