Lead Chiplet Interconnect Verification Architect

Semiengineering; Valbonne; Presencial; EUR 90.000 - 130.000; Jornada completa

Descripción de la vacante

Semiengineering is seeking a Principal Verification Engineer to lead the development of advanced test benches for next-generation interconnect IP architectures and to enable verification of configurable chiplet designs.

You will be part of the Advanced Engineering team and help shape the future of System-on-Chip design.

This role focuses on coordinating activities, defining RTL verification tests, and achieving robust coverage at the system level.

Responsabilidades

• Lead the development of advanced test benches for next-generation interconnect validation
• Coordinate engineering activities to achieve verification objectives
• Define, document, develop, and execute RTL verification tests and coverage at system level

Descripción del empleo

Semiengineering is seeking a Principal Verification Engineer to lead the development of advanced test benches for next-generation interconnect IP architectures and to enable verification of configurable chiplet designs.

You will be part of the Advanced Engineering team and help shape the future of System-on-Chip design.

This role focuses on coordinating activities, defining RTL verification tests, and achieving robust coverage at the system level.