SoC Verification Intern: Build Reusable Testbenches

Arm; Valbonne; On-site; EUR 23,000 - 31,000; Full time

Job summary

Arm is seeking a Verification Intern to help improve how complex SoC designs are verified. You’ll gain hands-on experience with CoreSight features, and guidance from experienced engineers, while developing a reusable testbench framework to simplify integration and scaling across future projects.

The role involves reviewing current verification flows, defining an architecture for a reusable testbench, and running simulations to measure improvements in setup time and debugging effort, with

Qualifications

• Currently enrolled and pursuing a Master’s degree in Electronic or Microelectronic Engineering, Computer Science or equivalent.
• Knowledge of SoC- and IP-level verification fundamentals.
• Familiarity with Verilog/SystemVerilog and UVM.
• Proficiency in software programming.

Responsibilities

• Review current SoC-level verification flow, focusing on CoreSight debug and trace features.
• Assess existing testbench for reuse, scalability, and bring-up for new SoC environments.
• Help to define architecture of a reusable testbench for SoC debug and trace verification.
• Develop a plug‑and‑play framework that simplifies integration of memory-map elements and CoreSight components.
• Demonstrate the framework using representative SoC-level use cases.
• Run simulations and evaluate improvements in setup time and debugging effort.
• Document the framework’s architecture, integration process, and reuse guidelines.

Skills

SoC verification fundamentals

English fluency

Software programming

Arm architectures understanding

Education

Master's degree in Electronic/Microelectronic Engineering or Computer Science

Tools

Verilog

SystemVerilog

UVM

Job description

Arm is seeking a Verification Intern to help improve how complex SoC designs are verified. You’ll gain hands-on experience with CoreSight features, and guidance from experienced engineers, while developing a reusable testbench framework to simplify integration and scaling across future projects.

The role involves reviewing current verification flows, defining an architecture for a reusable testbench, and running simulations to measure improvements in setup time and debugging effort, with