Principle Engineer - CAD (Physical Verification)

Microchip Technology Inc.

Rousset-Serre-Ponçon

On-site

EUR 60,000 - 85,000

Full time

14 days+

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Job summary

Microchip Technology Inc. is seeking an experienced physical verification engineer to develop PV test cases and support layout engineers with PV activities using Calibre, Pegasus, and Hercules.

The role involves developing and debugging PV issues, creating and refining rule decks, and supporting remote sites worldwide to improve device quality and manufacturability.

Qualifications

  • 5+ years developing and supporting PDK activities.
  • Fluent with SVRF and TVF.
  • Accomplished at debugging PV issues.
  • Familiar with customizing Calibre Interactive.
  • Solid knowledge of layout rules and foundry rules.
  • Strong knowledge of Cadence Virtuoso and CalibreDRV.
  • Experience using AI solution.
  • Excellent English verbal and written communication and interpersonal skills.

Responsibilities

  • Develop physical verification regression test cases for QA of physical verification decks.
  • Support Layout and Design engineers with PV activities using verification tools (Calibre, Pegasus, Hercules).
  • Develop rule decks to support flow and verify/enhance foundry rule decks.
  • Support remote sites worldwide with layout verification activities.
  • Assist in debugging physical verification issues.
  • Collaborate with team to improve quality and reliability of devices.

Skills

PV debugging
Foundry rules knowledge
Team collaboration
English communication
AI/automation awareness

Tools

Siemens Calibre
Cadence Pegasus
Synopsys Hercules
Calibre Interactive
Cadence Virtuoso

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Develop physical verification regression test cases to QA physical verification decks
Support Layout and Design engineers with physical verification activities using verification tools such as Siemens Calibre,
Cadence Pegasus, or Synopsys Hercules

  • Utilize Knowledge of advanced EDA methods to support ESD, ERC, Voltage-Aware DRC, via doubling methodologies, etc. Work with Technology Development and Device Engineering to develop DRC rules, additional devices, and design for manufacturability checks
  • Develop rule decks as needed to support flow
  • Verify and enhance foundry rule decks
  • Support remote sites worldwide with layout verification activities
  • Support debug of physical verification issues
  • Work as a member of team to develop flows to improve quality and reliability of device
Requirements/Qualifications:
  • 5+ years developing and supporting PDK activities.
  • Fluent with SVRF and TVF.
  • Accomplished at debugging PV issues
  • Familiar with customizing Calibre Interactive.
  • Solid knowledge of layout rules and concepts, device identification concepts, and foundry rules.
  • Strong knowledge of Cadence Virtuoso and CalibreDRV.
  • Experience using AI solution
  • Excellent English verbal and written communication and interpersonal skills.
Travel Time:

0% - 25%

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