Hybrid Verification Engineer - PCIe/PHY IP Integration

Rambus.com

Aix-en-Provence

Hybride

EUR 50 000 - 75 000

Plein temps

14 jours+

Une candidature complète en une minute

Un CV et une lettre de motivation personnalisés, prêts à envoyer.

Passez les filtres ATS

Résumé du poste

Rambus in Sofia, Bulgaria, is seeking a mid-level Design and Verification Engineer to join our PHY integration team. You will contribute to pre-silicon RTL design and verification for PCIe Controller Soft IP and PHY integrations in a global environment.

The role requires strong Verilog/SystemVerilog experience, ASIC/VLSI verification, and collaboration with international teams. Travel flexibility and excellent English are expected as we support customers worldwide.

Qualifications

  • Can Do attitude and willingness to travel.
  • Bachelor's or Master's degree in Electronics Engineering, Computer Science, or related disciplines.
  • Strong analytical and problem-solving skills.
  • Excellent interpersonal skills and ability to work with international teams.
  • Very good English is important for the position.

Responsabilités

  • Verilog RTL design to integrate PCIe IP with PHY modules.
  • Verify IP integration with dedicated simulation environment.
  • Develop and support test cases for verification environments.
  • Support worldwide customers on IP integration.
  • Maintain traceability from specs to verification results.
  • Report progress and difficulties periodically.

Connaissances

Verilog
SystemVerilog
FPGA prototyping
ASIC/VLSI verification
English proficiency
Travel openness
Analytical thinking
Interpersonal skills
Team collaboration

Formation

Bachelor's or Master's in Electronics Engineering, Computer Science, or related disciplines

Outils

UVM
Verilog/VHDL simulators

Description du poste

Rambus in Sofia, Bulgaria, is seeking a mid-level Design and Verification Engineer to join our PHY integration team. You will contribute to pre-silicon RTL design and verification for PCIe Controller Soft IP and PHY integrations in a global environment.

The role requires strong Verilog/SystemVerilog experience, ASIC/VLSI verification, and collaboration with international teams. Travel flexibility and excellent English are expected as we support customers worldwide.

Obtenez votre examen gratuit et confidentiel de votre CV.

ou faites glisser et déposez votre fichier ici.

Similar jobs

Postes similaires à comparer

MTS Verification Engineering
MTS Verification Engineering

Rambus • Marseille

Hybride
EUR 70 000 - 90 000
Competitive compensation package
Flexible work environment
Employee benefits
Lead MTS Verification Engineering
Lead MTS Verification Engineering

Rambus.com • Aix-en-Provence

Hybride
EUR 50 000 - 75 000
Senior PCIe/CXL RTL Design Architect (Hybrid)
Senior PCIe/CXL RTL Design Architect (Hybrid)

Rambus • Aix-en-Provence

Hybride
EUR 70 000 - 110 000
Health insurance
Employee Stock Purchase Plan
Extra vacation day per quarter
+2
MTS Verification Engineer: PCIe & PHY Integration
MTS Verification Engineer: PCIe & PHY Integration

Rambus • Marseille

Hybride
EUR 70 000 - 90 000
Competitive compensation package
Flexible work environment
Employee benefits
Principal PCIe CXL RTL Design Engineer
Principal PCIe CXL RTL Design Engineer

Rambus • Aix-en-Provence

Hybride
EUR 70 000 - 110 000
Health insurance
Employee Stock Purchase Plan
Extra vacation day per quarter
+2
Senior PCIe/CXL IP Design Engineer - Hybrid (RTL/FPGA)
Senior PCIe/CXL IP Design Engineer - Hybrid (RTL/FPGA)

IC Resources • Provence-Alpes-Côte d'Azur

Hybride
EUR 90 000 - 120 000
Employee Stock Purchase Plan
Hybrid working with two days remote
Pension and savings benefits
+1
Digital Verification Engineer — PCIe/RISC-V/UVM Expert
Digital Verification Engineer — PCIe/RISC-V/UVM Expert

Arago Inc. • Paris

Sur place
EUR 90 000 - 150 000
Relocation assistance
Healthcare coverage
Pension contributions
+4
Functional Verification Intern – Networking IP (Hybrid)
Functional Verification Intern – Networking IP (Hybrid)

Kalray • Montbonnot-Saint-Martin

Hybride
EUR 10 000 - 13 000
Hybrid work
Meal vouchers
Team building activities
Principal RTL Design Engineer
Principal RTL Design Engineer

microTECH Global Limited • France

Hybride
EUR 70 000 - 100 000
Hybrid work model
Senior SoC Systems Design & RTL Verification Engineer
Senior SoC Systems Design & RTL Verification Engineer

Qualcomm • Provence-Alpes-Côte d'Azur

Sur place
EUR 75 000 - 110 000