Junior SOC FPGA & Firmware Engineer - Hybrid, Growth Path

GMV Spain; Madrid; Híbrido; EUR 30.000 - 45.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Competitive compensation

Hybrid working model

Wellbeing program

Flexible working hours

Descripción de la vacante

GMV Spain seeks a Junior Hardware Engineer to design digital hardware and firmware for FPGA/SoC systems within the Receiver team. This role offers a hybrid working model, emphasizing long-term collaboration on innovative projects.

Ideal candidates will hold a degree in software engineering, with skills in VHDL/Verilog, and experience with FPGA development tools. GMV offers a personalized career plan, competitive compensation, and a robust wellbeing program to support physical, mental, and financial health.

Formación

• Experience with FPGA development tools is preferred.
• Background in VHDL/Verilog and digital hardware design.
• Knowledge of standard interfaces like SPI and I2C.

Responsabilidades

• Design digital hardware and firmware in FPGA/SoC systems.
• Coding in VHDL/Verilog and conducting verification.
• Optimize resources and write technical documentation.

Conocimientos

VHDL/Verilog

FPGA development tools

C/C++/Rust

Scripting (Python, TCL, Shell)

Functional verification

Educación

Software engineering graduate

Herramientas

Vivado

ModelSIM

Matlab/Simulink

GIT

Descripción del empleo

GMV Spain seeks a Junior Hardware Engineer to design digital hardware and firmware for FPGA/SoC systems within the Receiver team. This role offers a hybrid working model, emphasizing long-term collaboration on innovative projects.

Ideal candidates will hold a degree in software engineering, with skills in VHDL/Verilog, and experience with FPGA development tools. GMV offers a personalized career plan, competitive compensation, and a robust wellbeing program to support physical, mental, and financial health.