DMS Verification Engineer for Mixed-Signal SoCs

Robert Bosch Group; Comunidad Valenciana; Presencial; EUR 45.000 - 70.000; Jornada completa

Descripción de la vacante

Robert Bosch Group is seeking an experienced DMS Verification Engineer in Valencia to join our engineering team. You will collaborate with system architects and analog/digital designers to develop verification strategies for Mixed-Signal SoCs.

Responsibilities include driving verification plans, managing resources, and executing regressions while tracking coverage and performance against circuit-level simulations. You will provide technical leadership and mentorship across multi-site teams.

Formación

• Proven experience in verification planning and debugging at RTL, gate, and schematic levels.
• Strong knowledge of SystemVerilog/Verilog and UVM.
• Experience with Gate-Level Simulations (GLS) and functional verification.
• Proficient in scripting (Python, Make, Shell).
• Excellent communication and teamwork in cross-site projects.

Responsabilidades

• Drive verification plans and strategies for DMS vs DV and model vs schematic.
• Plan resources, schedules, and progress; minimize showstoppers.
• Implement verification plans, run regressions, and measure coverage.
• Validate models against circuit-level simulations and measurements.
• Lead and mentor across multi-site engineering teams.

Conocimientos

SystemVerilog

UVM

DSP techniques

RTL debugging

Educación

Bachelor's/Master's in EE/CS

Herramientas

Python

Make

Shell

GLS

Descripción del empleo

Robert Bosch Group is seeking an experienced DMS Verification Engineer in Valencia to join our engineering team. You will collaborate with system architects and analog/digital designers to develop verification strategies for Mixed-Signal SoCs.

Responsibilities include driving verification plans, managing resources, and executing regressions while tracking coverage and performance against circuit-level simulations. You will provide technical leadership and mentorship across multi-site teams.