DMS Verification Engineer - Mixed-Signal SoCs

Bosch; Valencia; Presencial; EUR 45.000 - 70.000; Jornada completa

Descripción de la vacante

Bosch in Valencia is seeking an experienced DMS Verification Engineer to join our engineering team. You will collaborate with system architects and designers to develop comprehensive verification plans for mixed-signal SoCs and lead verification activities.

You will drive verification strategy, oversee regressions, and ensure coverage, while mentoring across multi-site teams. Fluency in English and EU work authorization are required, with a strong focus on reliability and innovation.

Formación

• Bachelor's or Master's degree in Electrical/Electronic Engineering, Telecommunications, Computer Science, or a related field.
• Proven experience in developing validation plans, analyzing test results, and debugging failures at RTL, gate, and schematic levels.
• Strong working knowledge of SystemVerilog/Verilog and UVM.
• Experience setting up, running, and debugging Gate-Level Simulations (GLS).
• Good understanding of DSP techniques and analog schematics.
• Strong problem‑solving, communication, and teamwork skills.
• Professional working proficiency in English (C1 level minimum).
• Valid work authorization for the European Union is required.

Responsabilidades

• Drive specification reviews to generate initial verification plans using Vmanager.
• Define verification strategies, including optimal partitioning between DMS and DV, and model versus schematic equivalence.
• Plan and manage resources, schedules, and progress tracking, identifying and addressing potential showstoppers.
• Implement verification plans, run regressions, and track functional and code coverage.
• Verify the accuracy and performance of behavioral models against circuit-level simulations and measurements.
• Perform root-cause analysis and debug issues down to RTL, gate, and schematic levels.
• Maintain and improve functional verification infrastructure, flows, and UVM methodologies.
• Provide technical leadership, mentorship, and support across multi‑site engineering teams.

Conocimientos

SystemVerilog

UVM

GLS

DSP techniques

RTL debugging

Schematic debugging

English Proficiency

Teamwork

Problem solving

Educación

Electrical/Electronic Engineering

Herramientas

Vmanager

Descripción del empleo

Bosch in Valencia is seeking an experienced DMS Verification Engineer to join our engineering team. You will collaborate with system architects and designers to develop comprehensive verification plans for mixed-signal SoCs and lead verification activities.

You will drive verification strategy, oversee regressions, and ensure coverage, while mentoring across multi-site teams. Fluency in English and EU work authorization are required, with a strong focus on reliability and innovation.