Senior ASIC Layout Lead - Ultra-Low-Power Mixed-Signal

TalentCloud Group; Lausanne; Hybrid; CHF 120,000 - 180,000; Full time

Job summary

TalentCloud Group in Lausanne area is seeking a Senior ASIC Physical Layout Engineer to lead the layout of advanced mixed-signal ASICs within a multidisciplinary IC design team. You will drive top-level integration, floorplanning and tape-out readiness in a trusted Swiss tech environment.

The role emphasizes collaborating with analog, RF, digital and system designers, resolving LVS/DRC challenges, and shaping layout methodologies for ultra-low-power SoCs and imaging/RF platforms.

Qualifications

• Experience delivering full-chip or top-level IC layout.
• Proficient in Cadence Virtuoso (XL).
• Experience with mixed-signal, analog and RF ASICs.
• Knowledge of advanced CMOS technologies.
• Proven tape-out experience.
• Ability to resolve LVS/top-level integration challenges.

Responsibilities

• Lead top-level physical layout integration for advanced mixed-signal ASICs.
• Drive floorplanning, chip finishing and physical verification through to successful tape-out.
• Resolve complex DRC/LVS/ERC challenges across advanced CMOS technologies.
• Collaborate closely with Analog, RF, Digital and System Designers.
• Contribute to ultra-low-power SoCs, imaging devices and advanced RF technologies.
• Help shape physical design methodologies and layout best practices.

Skills

Full-chip layout

Top-level layout

Mixed-signal ASICs

Analog ASICs

RF ASICs

LVS resolution

Tape-out experience

Tools

Cadence Virtuoso XL

Job description

TalentCloud Group in Lausanne area is seeking a Senior ASIC Physical Layout Engineer to lead the layout of advanced mixed-signal ASICs within a multidisciplinary IC design team. You will drive top-level integration, floorplanning and tape-out readiness in a trusted Swiss tech environment.

The role emphasizes collaborating with analog, RF, digital and system designers, resolving LVS/DRC challenges, and shaping layout methodologies for ultra-low-power SoCs and imaging/RF platforms.