Lead Physical Design Engineer: RTL-to-GDSII & PPA Lead

IC Resources; Zürich; Vor Ort; CHF 150.000 - 210.000; Vollzeit

Zusammenfassung

IC Resources seeks a Lead Physical Design Engineer in Zürich, Switzerland to own the RTL-to-GDSII flow for complex IP and SoC subsystems. This hands-on leadership role defines methodologies, drives execution, and scales a new backend team.

You will own PPA and sign-off, collaborating with digital, custom, and verification groups, shaping the physical design strategy from the ground up while mentoring a team of 5+ engineers.

Qualifikationen

• End-to-end RTL-to-GDSII ownership for full tapeouts.
• Expertise in timing closure and MCMM STA.
• Strong UPF/CPF knowledge for multi-voltage/power-gated designs.
• Integration of custom macros, SRAMs and I/O.
• Ability to mentor a backend team to sign-off quality.
• Hands-on Tcl/Python automation and CI/CD workflows.

Aufgaben

• Oversee RTL-to-GDSII flow from synthesis to sign-off.
• Define and automate robust implementation flow with constraints.
• Drive timing and power closure across corners and modes.
• Lead ECO cycles and ensure growth of P&R-signoff accuracy.
• Coordinate integration of macros, SRAMs, and clocks.
• Develop automated flows and dashboards for metrics.

Kenntnisse

Tapeouts ownership

EDA tool chain

Timing closure

UPF/CPF

Power optimization

Team leadership

Automation scripting

Foundry collaboration

Tools

Synopsys

Cadence

Jobbeschreibung

IC Resources seeks a Lead Physical Design Engineer in Zürich, Switzerland to own the RTL-to-GDSII flow for complex IP and SoC subsystems. This hands-on leadership role defines methodologies, drives execution, and scales a new backend team.

You will own PPA and sign-off, collaborating with digital, custom, and verification groups, shaping the physical design strategy from the ground up while mentoring a team of 5+ engineers.