Physical Design Engineer - 7nm+ RTL to GDS Innovation

IC Resources; Lausanne; Vor Ort; CHF 110.000 - 170.000; Vollzeit

Zusammenfassung

IC Resources in Lausanne is seeking a Physical Design Engineer to help advance next‑generation high‑speed circuits and communications technology. You will participate in the full implementation flow from RTL to GDS in a small, focused R&D team.

The role offers exposure to advanced process nodes, signoff methodologies, and scripting tasks (TCL/Python). Cadence tools experience and SerDes exposure are advantageous for future production silicon path.

Qualifikationen

• Experience across RTL to GDS in digital PD flow.
• Experience with 7nm nodes or below.
• Knowledge of timing closure and STA.
• Familiarity with physical verification and signoff.
• Scripting in TCL/Python/Shell.

Aufgaben

• End-to-end PD from RTL to GDS including signoff.
• Collaborate with R&D to implement new architectures.
• Contribute to methodology improvements and production silicon readiness.

Kenntnisse

Digital PD flow

RTL to GDS

7nm nodes

Timing closure

Scripting TCL/Python

CADENCE tools

SerDes exposure

Tools

Cadence toolset

Jobbeschreibung

IC Resources in Lausanne is seeking a Physical Design Engineer to help advance next‑generation high‑speed circuits and communications technology. You will participate in the full implementation flow from RTL to GDS in a small, focused R&D team.

The role offers exposure to advanced process nodes, signoff methodologies, and scripting tasks (TCL/Python). Cadence tools experience and SerDes exposure are advantageous for future production silicon path.