High-Speed Digital IC Designer for AI Interconnect

IC Resources; Vaud; On-site; CHF 120,000 - 160,000; Full time

Job summary

IC Resources is partnering with an advanced semiconductor company to hire a Digital IC Design Engineer focused on high-speed digital blocks and interfaces. You will execute RTL design and microarchitecture for multi-Gigabit links, DDR and memory interfaces, and work on PCIe, USB4, SerDes, and related protocols.

You will collaborate with analog, verification and physical design teams to drive design sign-off and post-silicon bring-up, turning system-level ideas into production silicon while

Qualifications

• Ideally 5-10 years of digital IC / ASIC design experience, with strong knowledge of:
• - RTL Design, SystemVerilog / Verilog, ASIC Design
• - High-Speed Digital Design, SerDes, DDR, PCIe, USB4
• - CDC, STA, Synthesis, Low-Power Design
• - Experience with multi-Gigabit transceivers, memory interfaces, mixed-signal ICs, Python scripting or Cadence tools

Responsibilities

• RTL design and microarchitecture for high-speed digital blocks
• Digital circuits for multi-Gigabit serial links, DDR and memory interfaces
• PCIe, USB4 and high-speed communication protocols
• Logic synthesis, STA, CDC and lint
• IP and chip-level integration
• Verification and design sign-off
• Post-silicon bring-up, debug and characterisation
• Working closely with analog, verification and physical design teams

Skills

RTL Design

SystemVerilog

Verilog

ASIC Design

High-Speed Digital Design

SerDes

DDR

PCIe

USB4

CDC

STA

Synthesis

Low-Power Design

Multi-Gigabit Transceivers

Memory Interfaces

Python Scripting

Cadence Tools

Education

MSc/PhD in Electronics or Electrical Engineering or Communications

Job description

IC Resources is partnering with an advanced semiconductor company to hire a Digital IC Design Engineer focused on high-speed digital blocks and interfaces. You will execute RTL design and microarchitecture for multi-Gigabit links, DDR and memory interfaces, and work on PCIe, USB4, SerDes, and related protocols.

You will collaborate with analog, verification and physical design teams to drive design sign-off and post-silicon bring-up, turning system-level ideas into production silicon while